; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -slp-vectorizer -mtriple=aarch64--linux-gnu -instcombine < %s | FileCheck %s

target datalayout = "e-m:e-i32:64-i128:128-n32:64-S128"

declare void @foo(i64, i64, i64, i64)

define void @test(<4 x i16> %a, <4 x i16> %b, i64* %p) {
; Make sure types of sub and its sources are not extended.
; CHECK-LABEL: @test(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[Z0:%.*]] = zext <4 x i16> [[A:%.*]] to <4 x i64>
; CHECK-NEXT:    [[Z1:%.*]] = zext <4 x i16> [[B:%.*]] to <4 x i64>
; CHECK-NEXT:    [[SUB0:%.*]] = sub nsw <4 x i64> [[Z0]], [[Z1]]
;
entry:
  %z0 = zext <4 x i16> %a to <4 x i32>
  %z1 = zext <4 x i16> %b to <4 x i32>
  %sub0 = sub <4 x i32> %z0, %z1
  %e0 = extractelement <4 x i32> %sub0, i32 0
  %s0 = sext i32 %e0 to i64
  %gep0 = getelementptr inbounds i64, i64* %p, i64 %s0
  %load0 = load i64, i64* %gep0
  %e1 = extractelement <4 x i32> %sub0, i32 1
  %s1 = sext i32 %e1 to i64
  %gep1 = getelementptr inbounds i64, i64* %p, i64 %s1
  %load1 = load i64, i64* %gep1
  %e2 = extractelement <4 x i32> %sub0, i32 2
  %s2 = sext i32 %e2 to i64
  %gep2 = getelementptr inbounds i64, i64* %p, i64 %s2
  %load2 = load i64, i64* %gep2
  %e3 = extractelement <4 x i32> %sub0, i32 3
  %s3 = sext i32 %e3 to i64
  %gep3 = getelementptr inbounds i64, i64* %p, i64 %s3
  %load3 = load i64, i64* %gep3
  call void @foo(i64 %load0, i64 %load1, i64 %load2, i64 %load3)
  ret void
}


Test case for PR409: Make sure that floating point constant values outside the range of a float cannot be assigned to a constant.

; RUN: llvm-as %s -o /dev/null 2>&1 | grep "constant invalid for type"

; make sure that 'float' values are in range

%D1 = constant double 3.40282347e+39
%D2 = constant double -3.40282347e+39
%F1 = constant float 3.40282346e+38
%F2 = constant float -3.40282346e+38
%D1 = constant float 3.40282347e+39
%D2 = constant float -3.40282347e+39


Test case for CanLowerReturn fix (r141981)

; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=ppc
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=ppc64

define <4 x float> @foo1(<2 x float> %a, <2 x float> %b) nounwind readnone {
entry:
  %0 = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
  %1 = shufflevector <2 x float> %b, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
  %2 = shufflevector <4 x float> %0, <4 x float> %1, <4 x i32> <i32 0, i32 4, i32 2, i32 5>
  ret <4 x float> %2
}

define <4 x double> @foo2(<2 x double> %a, <2 x double> %b) nounwind readnone {
entry:
  %0 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
  %1 = shufflevector <2 x double> %b, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
  %2 = shufflevector <4 x double> %0, <4 x double> %1, <4 x i32> <i32 0, i32 4, i32 2, i32 5>
  ret <4 x double> %2
}


; RUN: llc -mtriple=x86_64-apple-macosx10 -mattr=avx -show-mc-encoding < %s | FileCheck %s

define i64 @t1(double %d_ivar) nounwind uwtable ssp {
entry:
; CHECK: t1
  %0 = bitcast double %d_ivar to i64
; CHECK: vmovd
; CHECK: encoding: [0xc4,0xe1,0xf9,0x7e,0xc0]
  ret i64 %0
}

define double @t2(i64 %d_ivar) nounwind uwtable ssp {
entry:
; CHECK: t2
  %0 = bitcast i64 %d_ivar to double
; CHECK: vmovd
; CHECK: encoding: [0xc4,0xe1,0xf9,0x6e,0xc7]
  ret double %0
}


; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
; widen extract subvector

define void @convert(<2 x double>* %dst.addr, <3 x double> %src)  {
entry:
; CHECK: convert:
; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}}
; CHECK-NEXT: movapd
  %val = shufflevector <3 x double> %src, <3 x double> undef, <2 x i32> < i32 0, i32 1>
  store <2 x double> %val, <2 x double>* %dst.addr
  ret void
}


Add a testcase we should continue to argpromote

; RUN: llvm-as < %s | opt -argpromotion | llvm-dis | grep 'load int\* %A'

implementation

internal int %callee(bool %C, int* %P) {
	br bool %C, label %T, label %F
T:
	ret int 17
F:
	%X = load int* %P
	ret int %X
}

int %foo() {
	%A = alloca int
	store int 17, int* %A
	%X = call int %callee(bool false, int* %A)
	ret int %X
}


Add missing test for r275347 "[IPRA] Set callee saved registers to none for local function when IPRA is enabled."

; RUN: llc < %s | FileCheck %s -check-prefix=NOIPRA
; RUN: llc -enable-ipra < %s | FileCheck %s

target triple = "x86_64--"

define internal void @foo() norecurse {
; When IPRA is not enabled R15 will be saved by foo as it is callee saved reg.
; NOIPRA-LABEL: foo:
; NOIPRA: pushq	%r15
; When IPRA is enabled none register should be saved as foo() is local function
; so we optimize it to save no registers.
; CHECK-LABEL: foo:
; CHECK-NOT: pushq %r15
  call void asm sideeffect "movl	%r14d, %r15d", "~{r15}"()
  ret void
}

define void @bar(i32 %X) {
  call void asm sideeffect "movl  %r12d, $0", "{r15}~{r12}"(i32 %X)
  ; As R15 is clobbered by foo() when IPRA is enabled value of R15 should be
  ; saved if register containing orignal value is also getting clobbered
  ; and reloaded after foo(), here original value is loaded back into R15D after
  ; call to foo.
  call void @foo()
  ; CHECK-LABEL: bar:
  ; CHECK: callq foo
  ; CHECK-NEXT: movl  %eax, %r15d
  call void asm sideeffect "movl  $0, %r12d", "{r15}~{r12}"(i32 %X)
  ret void
}


Add "feature" testcase for new switch lowering code

; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$5 | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep \$6 | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1023 | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep 1024 | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep jg | wc -l | grep 2 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep ja | wc -l | grep 2 &&
; RUN: llvm-as < %s | llc -march=x86 -o - | grep je | wc -l | grep 1

define i32 @main(i32 %tmp158) {
entry:
        switch i32 %tmp158, label %bb336 [
	         i32 120, label %bb338
	         i32 121, label %bb338
                 i32 122, label %bb338
                 i32 123, label %bb338
                 i32 124, label %bb338
                 i32 125, label %bb338
                 i32 126, label %bb338
		 i32 1024, label %bb338
                 i32 0, label %bb338
                 i32 1, label %bb338
                 i32 2, label %bb338
                 i32 3, label %bb338
                 i32 4, label %bb338
		 i32 5, label %bb338
        ]
bb336:
  ret i32 10
bb338:
  ret i32 11
}


; RUN: llvm-as < %s | llc
target endian = big
target pointersize = 32
target triple = "powerpc-apple-darwin8.2.0"
implementation   ; Functions:

void %bar(int %G, int %E, int %F, int %A, int %B, int %C, int %D, sbyte* %fmt, ...) {
	%ap = alloca sbyte*		; <sbyte**> [#uses=2]
	call void %llvm.va_start( sbyte** %ap )
	%tmp.1 = load sbyte** %ap		; <sbyte*> [#uses=1]
	%tmp.0 = call double %foo( sbyte* %tmp.1 )		; <double> [#uses=0]
	ret void
}

declare void %llvm.va_start(sbyte**)

declare double %foo(sbyte*)


; RUN: opt -basicaa -print-memoryssa -verify-memoryssa -analyze < %s 2>&1 | FileCheck %s
;
; Checks that basicAA is doing some amount of disambiguation for us

define i32 @foo(i1 %cond) {
  %a = alloca i32, align 4
  %b = alloca i32, align 4
; CHECK: 1 = MemoryDef(liveOnEntry)
; CHECK-NEXT: store i32 0
  store i32 0, i32* %a, align 4
; CHECK: 2 = MemoryDef(1)
; CHECK-NEXT: store i32 1
  store i32 1, i32* %b, align 4

; CHECK: MemoryUse(1)
; CHECK-NEXT: %1 = load i32
  %1 = load i32, i32* %a, align 4
; CHECK: MemoryUse(2)
; CHECK-NEXT: %2 = load i32
  %2 = load i32, i32* %b, align 4

  %3 = add i32 %1, %2
  ret i32 %3
}


Add a test where phi translation was producing a null result.

; RUN: llvm-as < %s | opt -gvnpre | llvm-dis

define void @strength_test5(i32* %data) {
entry:
	br i1 false, label %cond_next16.preheader, label %cond_true

cond_true:		; preds = %entry
	%tmp12 = icmp sgt i32 0, 0		; <i1> [#uses=1]
	br i1 %tmp12, label %return, label %cond_next16.preheader

cond_next16.preheader:		; preds = %cond_true, %entry
	%i.01.1.ph = phi i32 [ 1, %entry ], [ 1, %cond_true ]		; <i32> [#uses=1]
	%i.01.1 = add i32 0, %i.01.1.ph		; <i32> [#uses=0]
	%indvar.next = add i32 0, 1		; <i32> [#uses=0]
	ret void

return:		; preds = %cond_true
	ret void
}


Test that logical operators are correctly constant propogated!

; Ensure constant propogation of logical instructions is working correctly.

; RUN: if as < %s | opt -constprop -die | dis | ggrep -E 'and|or|xor'
; RUN: then exit 1
; RUN: else exit 0
; RUN: fi

int  "test1"() { %R = and int 4,1234          ret int  %R }
bool "test1"() { %R = and bool true, false    ret bool %R }

int  "test2"() { %R = or int 4,1234          ret int  %R }
bool "test2"() { %R = or bool true, false    ret bool %R }

int  "test3"() { %R = xor int 4,1234          ret int  %R }
bool "test3"() { %R = xor bool true, false    ret bool %R }


Add a test for constant folding of bitcast to/from floating point.

; RUN: llvm-as < %s | llvm-dis | not grep bitcast

int %test1() {
   ret int bitcast(float 3.7 to int)
}

float %test2() {
  ret float bitcast(int 17 to float)
}

long %test3() {
  ret long bitcast (double 3.1415926 to long)
}

double %test4() {
  ret double bitcast (long 42 to double)
}


; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep weak_reference | wc -l | grep 2

%Y = global int (sbyte*)* %X
declare extern_weak int %X(sbyte*)

void %bar() {
	tail call void (...)* %foo( )
	ret void
}

declare extern_weak void %foo(...)


Add a x86-64 test case: movb %sil, %ah is illegal.

; RUN: llvm-as < %s | llc -march=x86-64 &&
; RUN: llvm-as < %s | llc -march=x86-64 | not grep 'movb %sil, %ah' &&
; RUN: llvm-as < %s | llc -march=x86-64 | grep 'movzbw %al, %ax'

void %handle_vector_size_attribute() {
entry:
	%tmp69 = load uint* null		; <uint> [#uses=1]
	switch uint %tmp69, label %bb84 [
		 uint 2, label %bb77
		 uint 1, label %bb77
	]

bb77:		; preds = %entry, %entry
	%tmp99 = udiv ulong 0, 0		; <ulong> [#uses=1]
	%tmp = load ubyte* null		; <ubyte> [#uses=1]
	%tmp114 = seteq ulong 0, 0		; <bool> [#uses=1]
	br bool %tmp114, label %cond_true115, label %cond_next136

bb84:		; preds = %entry
	ret void

cond_true115:		; preds = %bb77
	%tmp118 = load ubyte* null		; <ubyte> [#uses=1]
	br bool false, label %cond_next129, label %cond_true120

cond_true120:		; preds = %cond_true115
	%tmp127 = udiv ubyte %tmp, %tmp118		; <ubyte> [#uses=1]
	%tmp127 = cast ubyte %tmp127 to ulong		; <ulong> [#uses=1]
	br label %cond_next129

cond_next129:		; preds = %cond_true120, %cond_true115
	%iftmp.30.0 = phi ulong [ %tmp127, %cond_true120 ], [ 0, %cond_true115 ]		; <ulong> [#uses=1]
	%tmp132 = seteq ulong %iftmp.30.0, %tmp99		; <bool> [#uses=1]
	br bool %tmp132, label %cond_false148, label %cond_next136

cond_next136:		; preds = %cond_next129, %bb77
	ret void

cond_false148:		; preds = %cond_next129
	ret void
}


Add testcase for when there is no loop header

; Test that LICM works when there is not a loop-preheader
; RUN: as < %s | opt -licm | dis

void "testfunc"(int %i, bool %ifcond) {
	br bool %ifcond, label %Then, label %Else
Then:
	br label %Loop
Else:
	br label %Loop

Loop:
	%j = phi uint [0, %Then], [12, %Else], [%Next, %Loop]
	%i = cast int %i to uint
	%i2 = mul uint %i, 17
	%Next = add uint %j, %i2
	%cond = seteq uint %Next, 0
	br bool %cond, label %Out, label %Loop

Out:
	ret void
}


Add testcase for register scanveger assertion fix in r72755 (double def due to livevars)

; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | grep {fcpys s0, s1}

define float @f(float %z, double %a, float %b) {
        %tmp = call float @g(float %b)
        ret float %tmp
}

declare float @g(float)


; RUN: llc --code-model=kernel -march=x86-64 <%s | FileCheck %s
; PR4933
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kmem_cache_order_objects = type { i64 }
declare i8* @memset(i8*, i32, i64)
define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind {
  %pte.addr.i = alloca %struct.kmem_cache_order_objects*
  %call8 = call i8* @memset(i8* bitcast ([512 x %struct.kmem_cache_order_objects]* @bm_pte to i8*), i32 0, i64 4096)
; CHECK: movq    $bm_pte, %rdi
; CHECK-NEXT: xorl    %esi, %esi
; CHECK-NEXT: movl    $4096, %edx
; CHECK-NEXT: call    memset
  ret void
}
@bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096
; CHECK: .section        .bss.page_aligned,"aw",@nobits
; CHECK-NEXT: .align  4096
; CHECK-NEXT: bm_pte:
; CHECK-NEXT: .zero   4096
; CHECK-NEXT: .size   bm_pte, 4096


; RUN: llc -march=mipsel -force-mips-long-branch < %s | FileCheck %s

@g0 = external global i32

define void @foo1(i32 %s) nounwind {
entry:
; CHECK: lw  $[[R0:[a-z0-9]+]], %got($BB0_3)(${{[a-z0-9]+}})
; CHECK: addiu $[[R1:[a-z0-9]+]], $[[R0]], %lo($BB0_3)
; CHECK: jr  $[[R1]]

  %tobool = icmp eq i32 %s, 0
  br i1 %tobool, label %if.end, label %if.then

if.then:                                          ; preds = %entry
  %0 = load i32* @g0, align 4
  %add = add nsw i32 %0, 12
  store i32 %add, i32* @g0, align 4
  br label %if.end

if.end:                                           ; preds = %entry, %if.then
  ret void
}


Test that prune-eh doesn't make deductions based on bodies of functions with weak linkage.

; RUN: llvm-as < %s | opt -prune-eh | llvm-dis | not grep nounwind

define weak void @f() {
entry:
        ret void
}

define void @g() {
entry:
	call void @f()
	ret void
}


Remove unreachable blocks before splitting a coroutine.

; RUN: opt < %s -coro-early -coro-split -S | FileCheck %s
target datalayout = "E-p:64:64"

%swift.type = type { i64 }
%swift.opaque = type opaque
%T4red215EmptyCollectionV = type opaque
%TSi = type <{ i64 }>

define hidden swiftcc { i8*, %swift.opaque* } @no_suspends(i8* %buffer, i64 %arg) #1 {
  %id = call token @llvm.coro.id.retcon.once(i32 32, i32 8, i8* %buffer, i8* bitcast (void (i8*, i1)* @prototype to i8*), i8* bitcast (i8* (i64)* @malloc to i8*), i8* bitcast (void (i8*)* @free to i8*))
  %begin = call i8* @llvm.coro.begin(token %id, i8* null)
  call void @print(i64 %arg)
  call void @llvm.trap()
  unreachable

bb1:
  call void @print(i64 %arg)
  call i1 @llvm.coro.end(i8* %begin, i1 false)
  unreachable
}
; CHECK-LABEL: define hidden swiftcc { i8*, %swift.opaque* } @no_suspends(
; CHECK:         call token @llvm.coro.id.retcon.once
; CHECK-NEXT:    call void @print(i64 %arg)
; CHECK-NEXT:    call void @llvm.trap()
; CHECK-NEXT:    unreachable

declare swiftcc void @prototype(i8* noalias dereferenceable(32), i1)
declare void @print(i64)

declare noalias i8* @malloc(i64) #5
declare void @free(i8* nocapture) #5

declare token @llvm.coro.id.retcon.once(i32, i32, i8*, i8*, i8*, i8*) #5
declare i8* @llvm.coro.begin(token, i8* writeonly) #5
declare token @llvm.coro.alloca.alloc.i64(i64, i32) #5
declare i8* @llvm.coro.alloca.get(token) #5
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #6
declare i1 @llvm.coro.suspend.retcon.i1(...) #5
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #6
declare void @llvm.coro.alloca.free(token) #5
declare i1 @llvm.coro.end(i8*, i1) #5

declare void @llvm.trap()

attributes #1 = { noreturn nounwind }
attributes #5 = { nounwind }


Add a test case to make sure that the nop really does follow the bl on ppc64 elf

; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck  %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

declare i32 @clock() nounwind

define i32 @func() {
entry:
  %call = call i32 @clock() nounwind
  %call2 = add i32 %call, 7
  ret i32 %call2
}

; CHECK: bl clock
; CHECK-NEXT: nop


Test that shows unprofitability of instcombine with bit ranges

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -instcombine -S < %s | FileCheck %s

; Test that presence of range does not cause unprofitable transforms with bit
; arithmetics, and instcombine behaves exactly the same as without the range.

define i1 @without_range(i32* %A) {
; CHECK-LABEL: @without_range(
; CHECK-NEXT:    [[A_VAL:%.*]] = load i32, i32* [[A:%.*]], align 8
; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[A_VAL]], 2
; CHECK-NEXT:    ret i1 [[C]]
;
  %A.val = load i32, i32* %A, align 8
  %B = sdiv i32 %A.val, 2
  %C = icmp sge i32 0, %B
  ret i1 %C
}

define i1 @with_range(i32* %A) {
; CHECK-LABEL: @with_range(
; CHECK-NEXT:    [[A_VAL:%.*]] = load i32, i32* [[A:%.*]], align 8, !range !0
; CHECK-NEXT:    [[B_MASK:%.*]] = and i32 [[A_VAL]], 2147483646
; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[B_MASK]], 0
; CHECK-NEXT:    ret i1 [[C]]
;
  %A.val = load i32, i32* %A, align 8, !range !0
  %B = sdiv i32 %A.val, 2
  %C = icmp sge i32 0, %B
  ret i1 %C
}

!0 = !{i32 0, i32 2147483647}


; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=CHECK-PIC
; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=CHECK-STATIC

define void @count(i32 %x, i32 %y, i32 %z) noreturn nounwind readnone {
entry:
  br label %bosco

bosco:                                            ; preds = %bosco, %entry
  br label %bosco
}

; CHECK-PIC: b	$BB0_1
; CHECK-STATIC: j	$BB0_1


; Test linking of a bc file to an archive via llvm-ld.
; PR1434
; RUN: llvm-as %s -o %t.bar.bc -f
; RUN: echo {define i32* @foo(i32 %x) \{ ret i32* @baz \} \
; RUN:   @baz = external global i32 } | llvm-as -o %t.foo.bc -f
; RUN: llvm-ar rf %t.foo.a %t.foo.bc
; RUN: llvm-ar rf %t.bar.a %t.bar.bc
; RUN: llvm-ld -disable-opt %t.bar.bc %t.foo.a -o %t.bc
; RUN: llvm-ld -disable-opt %t.foo.bc %t.bar.a -o %t.bc
declare i32* @foo(...)
define i32* @bar() {
	%ret = call i32* (...)* @foo( i32 123 )
	ret i32* %ret
}
@baz = global i32 0


; RUN: llvm-as < %s | llc | grep msgr | count 2
; RUN: llvm-as < %s | llc | grep msr  | count 2

target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
target triple = "s390x-unknown-linux-gnu"

define i64 @foo(i64 %a, i64 %b) nounwind readnone {
entry:
	%mul = mul i64 %b, %a		; <i64> [#uses=1]
	ret i64 %mul
}

define i64 @foo2(i64 %a, i64 %b) nounwind readnone {
entry:
	%mul = mul i64 %b, %a		; <i64> [#uses=1]
	ret i64 %mul
}

define i32 @foo3(i32 %a, i32 %b) nounwind readnone {
entry:
	%mul = mul i32 %b, %a		; <i32> [#uses=1]
	ret i32 %mul
}

define i32 @foo4(i32 %a, i32 %b) nounwind readnone {
entry:
	%mul = mul i32 %b, %a		; <i32> [#uses=1]
	ret i32 %mul
}


; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s

define i1 @foo(i32 %i) optsize {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    andl $305419896, %edi # imm = 0x12345678
; CHECK-NEXT:    movl $305419896, %eax # imm = 0x12345678
; CHECK-NEXT:    cmpl %eax, %edi
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    retq
  %and = and i32 %i, 305419896
  %cmp = icmp eq i32 %and, 305419896
  ret i1 %cmp
}

define zeroext i1 @g(i32 %x) optsize {
; CHECK-LABEL: g:
; CHECK:       # %bb.0:
; CHECK-NEXT:    orl $1, %edi
; CHECK-NEXT:    movl $1, %eax
; CHECK-NEXT:    cmpl %eax, %edi
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    retq
  %t0 = or i32 %x, 1
  %t1 = icmp eq i32 %t0, 1
  ret i1 %t1
}


Add a test case to make sure that constant folding of the bit counting intrinsics works.

; Tests to make sure bit counts of constants are folded
; RUN: llvm-as < %s | opt -instcombine | llvm-dis -o /dev/null -f &&
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep 'llvm.ct'

declare i32 @llvm.ctpop.i31(i31 %val)
declare i32 @llvm.cttz.i32(i32 %val)
declare i32 @llvm.ctlz.i33(i33 %val)

define i32 %test(i32 %A) {
  %c1 = i32 call @llvm.ctpop(i31 12415124)
  %c2 = i32 call @llvm.cttz(i32 87359874)
  %c3 = i32 call @llvm.ctlz(i33 87359874)
  %r1 = add i32 %c1, %c2
  %r2 = add i32 %r1, %c3
  ret i32 %r2
}


Add a lsr common loop invariant hoisting test case

; RUN: llvm-as < %s | llc -march=x86 -enable-x86-lsr | grep 'A(' | wc -l | grep 1
;
; Make sure the common loop invariant _A(reg) is hoisted up to preheader.

%A = internal global [16 x [16 x int]] zeroinitializer, align 32

void %test(int %row, int %N) {
entry:
	%N = cast int %N to uint
	%tmp5 = setgt int %N, 0
	br bool %tmp5, label %cond_true, label %return

cond_true:
	%indvar = phi uint [ 0, %entry ], [ %indvar.next, %cond_true ]
	%i.0.0 = cast uint %indvar to int
	%tmp2 = add int %i.0.0, 1
	%tmp = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp2
	store int 4, int* %tmp
	%tmp5 = add int %i.0.0, 2
	%tmp7 = getelementptr [16 x [16 x int]]* %A, int 0, int %row, int %tmp5
	store int 5, int* %tmp7
	%indvar.next = add uint %indvar, 1
	%exitcond = seteq uint %indvar.next, %N
	br bool %exitcond, label %return, label %cond_true

return:
	ret void
}


Add a failing test on live block markup in term folding

; XFAIL: *
; REQUIRES: asserts
; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(indvars,simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s

; This test demonstrates a bug in live blocks markup that is only catchable in
; inter-pass interaction.
define void @test(i1 %c) {

; CHECK-LABEL: @test(

entry:
  br label %outer

outer:
  br i1 %c, label %to_fold, label %latch

to_fold:
  br i1 %c, label %latch, label %inner

inner:
  %iv = phi i32 [0, %to_fold], [%iv.next, %inner_latch]
  %never = icmp sgt i32 %iv, 40
  br i1 %never, label %inner_latch, label %undead

inner_latch:
  %iv.next = add i32 %iv, 1
  %cmp = icmp slt i32 %iv.next, 10
  br i1 %cmp, label %inner, label %latch

undead:
  br label %latch

latch:
  br i1 true, label %outer, label %dead_exit

dead_exit:
  ret void
}


Add tests for linker and linkonce globals

; This fails because the linker renames the non-opaque type not the opaque
; one...

; RUN: echo "%X = linkonce global int 8" | as > Output/%s.2.bc
; RUN: as < %s > Output/%s.1.bc
; RUN: link Output/%s.[12].bc | dis

%X = linkonce global int 7


Add test for constant shrinking with multiple users (NFC).

; RUN: llc -mtriple arm64-ios- %s -o - | FileCheck %s

; Check the -8 constant is shrunk if there are multiple users of the AND instruction.

; CHECK-LABEL:  _test:
; CHECK:          and x0, x0, #0xfffffff8
; CHECK-NEXT:     add x19, x0, #10
; CHECK-NEXT:     bl  _user

define i64 @test(i32 %a) {
  %ext = zext i32 %a to i64
  %v1 = and i64 %ext, -8
  %v2 = add i64 %v1, 10
  call void @user(i64 %v1)
  ret i64 %v2
}

declare void @user(i64)


; RUN: llvm-as < %s | llc -march=ppc32 | not grep 'extsh\|rlwinm r3, r3'

int %test1(short %X) {
	%Y = cast short %X to int  ;; dead
	ret int %Y
}

int %test2(ushort %X) {
	%Y = cast ushort %X to int
	%Z = and int %Y, 65535      ;; dead
	ret int %Z
}


; RUN: llc -mcpu=pwr7 -mtriple=powerpc64le-unknown-unknown -O0 < %s | FileCheck %s

define internal signext i32 @foo() #0 {
  ret i32 -125452974
}

; CHECK: lis 3, -1915
; CHECK: ori 3, 3, 48466


Test to ensure sub -> neg promotion is working and why.

; With sub reassociation, constant folding can eliminate the 12 and -12 constants.
;
; RUN: if as < %s | opt -reassociate -constprop -instcombine -die | dis | grep add
; RUN: then exit 1
; RUN: else exit 0
; RUN: fi

int "test"(int %A, int %B) {
	%X = add int -12, %A
	%Y = sub int %X, %B
	%Z = add int %Y, 12
	ret int %Z
}


Add a test showing how hidden stubs are handled on ppc.

; RUN: llc -mtriple=powerpc-apple-darwin < %s | FileCheck %s

@a = external hidden global i32
@b = external global i32

define i32* @get_a() {
  ret i32* @a
}

define i32* @get_b() {
  ret i32* @b
}

; CHECK:      .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
; CHECK-NEXT: .p2align  2
; CHECK-NEXT: L_b$non_lazy_ptr:
; CHECK-NEXT:   .indirect_symbol        _b
; CHECK-NEXT:   .long   0

; CHECK:      .section        __DATA,__data
; CHECK-NEXT: .p2align        2
; CHECK-NEXT: L_a$non_lazy_ptr:
; CHECK-NEXT:   .long   _a


Add test for folding constants into operands

; XFAIL: *
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s

; CHECK-LABEL: {{^}}main:
; CHECK-NOT: v_mov_b32_e32 v{{[0-9]+}}, 0xbf4353f8

define void @main(float) #0 {
main_body:
  %1 = fmul float %0, 0x3FE86A7F00000000
  %2 = fmul float %0, 0xBFE86A7F00000000
  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %1, float %1, float %2, float %2)
  ret void
}

declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)

attributes #0 = { "ShaderType"="1" }


; This testcase used to fail due to a lack of this diff in Value.cpp:
; diff -r1.16 Value.cpp
; 11c11
; < #include "llvm/Type.h"
; ---
; > #include "llvm/DerivedTypes.h"
; 74c74,76
; <   assert(Ty.get() == (const Type*)OldTy &&"Can't refine anything but my type!");
; ---
; >   assert(Ty.get() == OldTy &&"Can't refine anything but my type!");
; >   if (OldTy == NewTy && !OldTy->isAbstract())
; >     Ty.removeUserFromConcrete();
;
; This was causing an assertion failure, due to the "foo" Method object never releasing
; it's reference to the opaque %bb value.
;
declare void "foo"(%bb)

%exception_descriptor = type opaque

%bb = type int

implementation


; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

; Function Attrs: nounwind
define void @bar() #0 {
entry:
  tail call void @xxx([2 x i64] [i64 4607182418800017408, i64 4611686018427387904]) #0
  ret void

; CHECK-LABEL: @bar
; CHECK-DAG: li [[REG1:[0-9]+]], 1023
; CHECK-DAG: li [[REG2:[0-9]+]], {{1$}}
; CHECK-DAG: sldi 3, [[REG1]], 52
; CHECK-DAG: sldi 4, [[REG2]], 62
; CHECK: bl xxx
; CHECK: blr
}

declare void @xxx([2 x i64])

attributes #0 = { nounwind }


; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s

; Tests for indirect addressing on SI, which is implemented using dynamic
; indexing of vectors.

; CHECK: extract_w_offset
; CHECK: S_MOV_B32 M0
; CHECK-NEXT: V_MOVRELS_B32_e32
define void @extract_w_offset(float addrspace(1)* %out, i32 %in) {
entry:
  %0 = add i32 %in, 1
  %1 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %0
  store float %1, float addrspace(1)* %out
  ret void
}

; CHECK: extract_wo_offset
; CHECK: S_MOV_B32 M0
; CHECK-NEXT: V_MOVRELS_B32_e32
define void @extract_wo_offset(float addrspace(1)* %out, i32 %in) {
entry:
  %0 = extractelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, i32 %in
  store float %0, float addrspace(1)* %out
  ret void
}

; CHECK: insert_w_offset
; CHECK: S_MOV_B32 M0
; CHECK-NEXT: V_MOVRELD_B32_e32
define void @insert_w_offset(float addrspace(1)* %out, i32 %in) {
entry:
  %0 = add i32 %in, 1
  %1 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %0
  %2 = extractelement <4 x float> %1, i32 2
  store float %2, float addrspace(1)* %out
  ret void
}

; CHECK: insert_wo_offset
; CHECK: S_MOV_B32 M0
; CHECK-NEXT: V_MOVRELD_B32_e32
define void @insert_wo_offset(float addrspace(1)* %out, i32 %in) {
entry:
  %0 = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %in
  %1 = extractelement <4 x float> %0, i32 2
  store float %1, float addrspace(1)* %out
  ret void
}


Add a regression test for x86-64 red zone usage.

; RUN: llvm-as < %s | llc -march=x86-64 > %t
; RUN: not grep subq %t
; RUN: not grep addq %t
; RUN: grep {\\-4(%%rsp)} %t | count 2
; RUN: llvm-as < %s | llc -march=x86-64 -disable-red-zone > %t
; RUN: grep subq %t | count 1
; RUN: grep addq %t | count 1

define x86_fp80 @f0(float %f) nounwind readnone {
entry:
	%0 = fpext float %f to x86_fp80		; <x86_fp80> [#uses=1]
	ret x86_fp80 %0
}


Check that the right eh personality function is used.

; RUN: llvm-as < %s | llc -march=x86 -enable-eh -o - | grep zPLR

@error = external global i8		; <i8*> [#uses=2]

define void @_ada_x() {
entry:
	invoke void @raise( )
			to label %eh_then unwind label %unwind

unwind:		; preds = %entry
	%eh_ptr = tail call i8* @llvm.eh.exception( )		; <i8*> [#uses=2]
	%eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error )		; <i32> [#uses=1]
	%eh_typeid = tail call i32 @llvm.eh.typeid.for( i8* @error )		; <i32> [#uses=1]
	%tmp2 = icmp eq i32 %eh_select, %eh_typeid		; <i1> [#uses=1]
	br i1 %tmp2, label %eh_then, label %Unwind

eh_then:		; preds = %unwind, %entry
	ret void

Unwind:		; preds = %unwind
	tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr )		; <i32>:0 [#uses=0]
	unreachable
}

declare void @raise()

declare i8* @llvm.eh.exception()

declare i32 @llvm.eh.selector(i8*, i8*, ...)

declare i32 @llvm.eh.typeid.for(i8*)

declare i32 @__gnat_eh_personality(...)

declare i32 @_Unwind_Resume(...)


; RUN: opt -S -ipsccp < %s | FileCheck %s

declare void @foo()
declare void @goo()
declare void @patatino()

define void @test1(i32 %t) {
  %choice = icmp eq i32 undef, -1
  switch i1 %choice, label %first [i1 0, label %second
                                   i1 1, label %third]
first:
  call void @foo()
  ret void
second:
  call void @goo()
  ret void
third:
  call void @patatino()
  ret void
}

; CHECK: define void @test1(i32 %t) {
; CHECK-NEXT:   br label %second
; CHECK: second:
; CHECK-NEXT:   call void @goo()
; CHECK-NEXT:   ret void
; CHECK-NEXT: }


Test case to check that separate section is created for a global variable specified with section attribute.

; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s

@G1 = common global i16 0, section "usersection", align 1
; CHECK: usersection UDATA
; CHECK: @G1 RES 2


Add test case for report_fatal_error added in r352699.

;RUN: not llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK

; Make sure we generate fatal error from the type legalizer for using a 64-bit
; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable.

; CHECK: LLVM ERROR: Do not know how to expand the result of this operator!
define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
  %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
  ret i64 %res
}
declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone


; RUN: opt < %s -S -inline -inline-threshold=20 | FileCheck %s
; Check that we don't drop FastMathFlag when estimating inlining profitability.
;
; In this test we should inline 'foo'  to 'boo', because it'll fold to a
; constant.

target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

define float @foo(float* %a, float %b) {
entry:
  %a0 = load float* %a, align 4
  %mul = fmul fast float %a0, %b
  %tobool = fcmp une float %mul, 0.000000e+00
  br i1 %tobool, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  %a1 = load float* %a, align 8
  %arrayidx1 = getelementptr inbounds float* %a, i64 1
  %a2 = load float* %arrayidx1, align 4
  %add = fadd fast float %a1, %a2
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  %storemerge = phi float [ %add, %if.then ], [ 1.000000e+00, %entry ]
  ret float %storemerge
}

; CHECK-LABEL: @boo
; CHECK-NOT: call float @foo
define float @boo(float* %a) {
entry:
  %call = call float @foo(float* %a, float 0.000000e+00)
  ret float %call
}


Test that eh_selector lowering accepts global variables as well as bitcasts of global variables.

; RUN: llvm-as < %s | llc -enable-eh

; ModuleID = '2007-04-14-EHSelectorCrash.bc'
@__gnat_others_value = external constant i32		; <i32*> [#uses=1]

define void @_ada_eh() {
entry:
	%eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector( i8* null, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_others_value )		; <i32> [#uses=0]
	ret void
}

declare i32 @llvm.eh.selector(i8*, i8*, ...)

declare i32 @__gnat_eh_personality(...)


; RUN: opt < %s  -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"

; Make sure that the reverse iterators are calculated using 64bit arithmetic, not 32.
;
; int foo(int n, int *A) {
;   int sum;
;   for (int i=n; i > 0; i--)
;     sum += A[i*2];
;   return sum;
; }
;

;CHECK: @foo
;CHECK:  <i64 0, i64 -1, i64 -2, i64 -3>
;CHECK: ret
define i32 @foo(i32 %n, i32* nocapture %A) {
  %1 = icmp sgt i32 %n, 0
  br i1 %1, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %0
  %2 = sext i32 %n to i64
  br label %3

; <label>:3                                       ; preds = %.lr.ph, %3
  %indvars.iv = phi i64 [ %2, %.lr.ph ], [ %indvars.iv.next, %3 ]
  %sum.01 = phi i32 [ undef, %.lr.ph ], [ %9, %3 ]
  %4 = trunc i64 %indvars.iv to i32
  %5 = shl nsw i32 %4, 1
  %6 = sext i32 %5 to i64
  %7 = getelementptr inbounds i32* %A, i64 %6
  %8 = load i32* %7, align 4
  %9 = add nsw i32 %8, %sum.01
  %indvars.iv.next = add i64 %indvars.iv, -1
  %10 = trunc i64 %indvars.iv.next to i32
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %3, label %._crit_edge

._crit_edge:                                      ; preds = %3, %0
  %sum.0.lcssa = phi i32 [ undef, %0 ], [ %9, %3 ]
  ret i32 %sum.0.lcssa
}


Add a basic test-case for passing and returning <4 x double> and <8 x float> values on X86.

; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {addps %xmm3, %xmm1}
; RUN: llvm-as < %s | llc -mattr=+sse2 | grep {addps %xmm2, %xmm0}

define <4 x double> @foo(<4 x double> %x, <4 x double> %z) {
  %y = mul <4 x double> %x, %z
  ret <4 x double> %y
}

define <8 x float> @bar(<8 x float> %x, <8 x float> %z) {
  %y = add <8 x float> %x, %z
  ret <8 x float> %y
}


Add a test for state reset in MCMachOStreamer

; Check that there is no persistent state in the MachO emitter that crashes
; us when reusing the pass manager.
; RUN: llc -mtriple=x86_64-apple-darwin -compile-twice -filetype=obj %s -o -

; Force the creation of a DWARF section
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4}

!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "LLVM", isOptimized: true)
!1 = !DIFile(filename: "<stdin>", directory: "/")
!3 = !{i32 2, !"Dwarf Version", i32 4}
!4 = !{i32 2, !"Debug Info Version", i32 3}


Add lit testcase for bitcast problem. NFC

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -constprop -S -o - | FileCheck %s

; Testcase that point out faulty bitcast that cast between different sizes.
; See "bitcast ([1 x %rec8]* @a to <2 x i16*>)" in checks below

%rec8 = type { i16 }
@a = global [1 x %rec8] zeroinitializer

define <2 x i16*> @test_gep() {
; CHECK-LABEL: @test_gep(
; CHECK-NEXT:    ret <2 x i16*> bitcast ([1 x %rec8]* @a to <2 x i16*>)
;
  %A = getelementptr [1 x %rec8], [1 x %rec8]* @a, <2 x i16> zeroinitializer, <2 x i64> zeroinitializer
  %B = bitcast <2 x %rec8*> %A to <2 x i16*>
  ret <2 x i16*> %B
}

; Testcase that verify the cast-of-cast when the outer/second cast is to a
; vector type.

define <4 x i16> @test_mmx_const() {
; CHECK-LABEL: @test_mmx_const(
; CHECK-NEXT:    ret <4 x i16> zeroinitializer
;
  %A = bitcast <2 x i32> zeroinitializer to x86_mmx
  %B = bitcast x86_mmx %A to <4 x i16>
  ret <4 x i16> %B
}


Fix a verifier bug that was preventing us from ripping povray+libpng to pieces.

; %inc2 uses it's own value, but that's ok, as it's unreachable!

void %test() {
entry:
        ret void

no_exit.2:              ; preds = %endif.6
        %tmp.103 = setlt double 0x0, 0x0                ; <bool> [#uses=1]
        br bool %tmp.103, label %endif.6, label %else.0

else.0:         ; preds = %no_exit.2
        store ushort 0, ushort* null
        br label %endif.6

endif.6:                ; preds = %no_exit.2, %else.0
        %inc.2 = add int %inc.2, 1              ; <int> [#uses=2]
        %tmp.96 = setlt int %inc.2, 0           ; <bool> [#uses=1]
        br bool %tmp.96, label %no_exit.2, label %UnifiedReturnBlock1

UnifiedReturnBlock1:            ; preds = %endif.6
        ret void
}


Revert "[thinlto] Deleted unused test file"

; Test to check the callgraph in summary when there is PGO
; RUN: opt -module-summary %s -o %t.o
; RUN: llvm-bcanalyzer -dump %t.o | FileCheck %s
; RUN: opt -module-summary %p/Inputs/thinlto-function-summary-callgraph.ll -o %t2.o
; RUN: llvm-lto -thinlto -o %t3 %t.o %t2.o
; RUN: llvm-bcanalyzer -dump %t3.thinlto.bc | FileCheck %s --check-prefix=COMBINED

; CHECK:       <GLOBALVAL_SUMMARY_BLOCK
; CHECK-NEXT:    <VERSION
; See if the call to func is registered, using the expected callsite count
; and profile count, with value id matching the subsequent value symbol table.
; CHECK-NEXT:    <PERMODULE_PROFILE {{.*}} op4=[[FUNCID:[0-9]+]] op5=1 op6=1/>
; CHECK-NEXT:  </GLOBALVAL_SUMMARY_BLOCK>
; CHECK-NEXT:  <VALUE_SYMTAB
; CHECK-NEXT:    <FNENTRY {{.*}} record string = 'main'
; External function func should have entry with value id FUNCID
; CHECK-NEXT:    <ENTRY {{.*}} op0=[[FUNCID]] {{.*}} record string = 'func'
; CHECK-NEXT:  </VALUE_SYMTAB>

; COMBINED:       <GLOBALVAL_SUMMARY_BLOCK
; COMBINED-NEXT:    <VERSION
; COMBINED-NEXT:    <COMBINED
; See if the call to func is registered, using the expected callsite count
; and profile count, with value id matching the subsequent value symbol table.
; COMBINED-NEXT:    <COMBINED_PROFILE {{.*}} op5=[[FUNCID:[0-9]+]] op6=1 op7=1/>
; COMBINED-NEXT:  </GLOBALVAL_SUMMARY_BLOCK>
; COMBINED-NEXT:  <VALUE_SYMTAB
; Entry for function func should have entry with value id FUNCID
; COMBINED-NEXT:    <COMBINED_ENTRY {{.*}} op0=[[FUNCID]] op1=7289175272376759421/>
; COMBINED-NEXT:    <COMBINED
; COMBINED-NEXT:  </VALUE_SYMTAB>

; ModuleID = 'thinlto-function-summary-callgraph.ll'
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define i32 @main() #0 !prof !2 {
entry:
    call void (...) @func()
    ret i32 0
}

declare void @func(...) #1

!2 = !{!"function_entry_count", i64 1}


Add a new test case for optimal rotation

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK

define void @bar()  {
; Test that all edges in the loop chain are fall through with profile data.
;
; CHECK-LABEL: bar:
; CHECK: latch
; CHECK: header
; CHECK: if.then
; CHECK: end

entry:
  br label %header

header:
  call void @e()
  %call = call zeroext i1 @a()
  br i1 %call, label %if.then, label %latch, !prof !2

if.then:
  call void @f()
  %call3 = call zeroext i1 @a()
  br i1 %call3, label %latch, label %end, !prof !3

latch:
  call void @h()
  %call2 = call zeroext i1 @a()
  br i1 %call2, label %header, label %end, !prof !4

end:
  ret void
}

declare zeroext i1 @a()
declare void @e()
declare void @f()
declare void @g()
declare void @h()

!1 = !{!"branch_weights", i32 16, i32 16}
!2 = !{!"branch_weights", i32 16, i32 16}
!3 = !{!"branch_weights", i32 97, i32 3}
!4 = !{!"branch_weights", i32 97, i32 3}


Add extra test for extractelement shuffle, NFC.

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slp-vectorizer -S -o - -mtriple=x86-64-unknown-linux -mcpu=bdver2 -slp-schedule-budget=1 | FileCheck %s

define <2 x i8> @g(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @g(
; CHECK-NEXT:    [[X0:%.*]] = extractelement <2 x i8> [[X:%.*]], i32 0
; CHECK-NEXT:    [[Y1:%.*]] = extractelement <2 x i8> [[Y:%.*]], i32 1
; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X0]], i32 0
; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[Y1]], i32 1
; CHECK-NEXT:    [[TMP3:%.*]] = mul <2 x i8> [[TMP2]], [[TMP2]]
; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <2 x i8> [[TMP3]], i32 0
; CHECK-NEXT:    [[INS1:%.*]] = insertelement <2 x i8> undef, i8 [[TMP4]], i32 0
; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x i8> [[TMP3]], i32 1
; CHECK-NEXT:    [[INS2:%.*]] = insertelement <2 x i8> [[INS1]], i8 [[TMP5]], i32 1
; CHECK-NEXT:    ret <2 x i8> [[INS2]]
;
  %x0 = extractelement <2 x i8> %x, i32 0
  %y1 = extractelement <2 x i8> %y, i32 1
  %x0x0 = mul i8 %x0, %x0
  %y1y1 = mul i8 %y1, %y1
  %ins1 = insertelement <2 x i8> undef, i8 %x0x0, i32 0
  %ins2 = insertelement <2 x i8> %ins1, i8 %y1y1, i32 1
  ret <2 x i8> %ins2
}


Add a test case for PR15318 fixed in r177472

; RUN: llc < %s

define internal i1 @f(float %s) {
entry:
  %c = fcmp ogt float %s, 0x41EFFFFFE0000000
  ret i1 %c
}


Test case for r122215 when InstCombine optimizes memset

; RUN: opt < %s -instcombine -S | FileCheck %s

; Test to check that instcombine doesn't drop the address space when optimizing
; memset.
%struct.Moves = type { [9 x i8], i8, i8, i8, [5 x i8] }

define i32 @test(%struct.Moves addrspace(1)* nocapture %moves) {
entry:
; CHECK: bitcast i8 addrspace(1)* %gep to i64 addrspace(1)*
	%gep = getelementptr inbounds %struct.Moves addrspace(1)* %moves, i32 1, i32 0, i32 9
	 call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %gep, i8 0, i64 8, i32 1, i1 false)
	ret i32 0
}

declare void @llvm.memset.p1i8.i64(i8addrspace(1)* nocapture, i8, i64, i32, i1) nounwind


Add a test case for PR1271 (necessary, but not sufficient).

; PR1271
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep and
define i1 @test(i32 %tmp13) {
entry:
	%tmp14 = shl i32 %tmp13, 12		; <i32> [#uses=1]
	%tmp15 = lshr i32 %tmp14, 12		; <i32> [#uses=1]
	%res = icmp ne i32 %tmp15, 0		; <i1>:3 [#uses=1]
        ret i1 %res
}


; RUN: if as < %s | opt -funcresolve -globaldce | dis | grep declare
; RUN: then exit 1
; RUN: else exit 0
; RUN: fi

declare void %qsortg(sbyte*, int, int)

void %test() {
	call void %qsortg(sbyte* null, int 0, int 0)
	ret void
}

int %qsortg(sbyte* %base, int %n, int %size) {
	ret int %n
}


Test case for the recently fixed FindModifiedNodeSlot bug.

; RUN: llvm-as < %s | llc -march=x86 | grep shrl
; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31
; is then optimized away.

%tree_code_type = external global [0 x uint]

void %copy_if_shared_r() {
	%tmp = load uint* null
	%tmp56 = and uint %tmp, 255
	%tmp8 = getelementptr [0 x uint]* %tree_code_type, int 0, uint %tmp56
	%tmp9 = load uint* %tmp8
	%tmp10 = add uint %tmp9, 4294967295
	%tmp = setgt uint %tmp10, 2
	%tmp14 = load uint* null
	%tmp15 = shr uint %tmp14, ubyte 31
	%tmp15 = cast uint %tmp15 to ubyte
	%tmp16 = setne ubyte %tmp15, 0
	br bool %tmp, label %cond_false25, label %cond_true

cond_true:
	br bool %tmp16, label %cond_true17, label %cond_false

cond_true17:
	ret void

cond_false:
	ret void

cond_false25:
	ret void
}


Add a bitcode regression test for I16 switch


; XFAIL: *
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI

; SI-LABEL: @global_store_v3i64:
; SI: BUFFER_STORE_DWORDX4
; SI: BUFFER_STORE_DWORDX4
define void @global_store_v3i64(<3 x i64> addrspace(1)* %out, <3 x i64> %x) {
  store <3 x i64> %x, <3 x i64> addrspace(1)* %out, align 32
  ret void
}

; SI-LABEL: @global_store_v3i64_unaligned:
define void @global_store_v3i64_unaligned(<3 x i64> addrspace(1)* %out, <3 x i64> %x) {
  store <3 x i64> %x, <3 x i64> addrspace(1)* %out, align 1
  ret void
}

; SI-LABEL: @local_store_v3i64:
define void @local_store_v3i64(<3 x i64> addrspace(3)* %out, <3 x i64> %x) {
  store <3 x i64> %x, <3 x i64> addrspace(3)* %out, align 32
  ret void
}

; SI-LABEL: @local_store_v3i64_unaligned:
define void @local_store_v3i64_unaligned(<3 x i64> addrspace(1)* %out, <3 x i64> %x) {
  store <3 x i64> %x, <3 x i64> addrspace(1)* %out, align 1
  ret void
}


Add a testcase to make sure that we don't emit two fneg instructions back to back for certain fsel instructions.

; RUN: llvm-as < %s | llc -march=ppc32 -enable-ppc-pattern-isel | not grep fneg

double %test_fneg_sel(double %A, double %B, double %C) {
    %D = sub double -0.0, %A
    %Cond = setgt double %D, -0.0
    %E = select bool %Cond, double %B, double %C
	ret double %E
}


; RUN: llc -enable-misched -misched=shuffle -enable-aa-sched-mi -post-RA-scheduler=0 -mcpu=ppc64 < %s | FileCheck %s

; REQUIRES: asserts
; -misched=shuffle is NDEBUG only!

target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

%"class.llvm::MCOperand" = type { i8, %union.anon.110 }
%union.anon.110 = type { i64 }

define void @foo(i32 %v) {
entry:
  %MCOp = alloca %"class.llvm::MCOperand", align 8
  br label %next

; CHECK-LABEL: @foo

next:
  %sunkaddr18 = ptrtoint %"class.llvm::MCOperand"* %MCOp to i64
  %sunkaddr19 = add i64 %sunkaddr18, 8
  %sunkaddr20 = inttoptr i64 %sunkaddr19 to double*
  store double 0.000000e+00, double* %sunkaddr20, align 8, !tbaa !1
  %sunkaddr21 = ptrtoint %"class.llvm::MCOperand"* %MCOp to i64
  %sunkaddr22 = add i64 %sunkaddr21, 8
  %sunkaddr23 = inttoptr i64 %sunkaddr22 to i32*
  store i32 %v, i32* %sunkaddr23, align 8, !tbaa !2
  ret void

; Make sure that the 64-bit store comes first, regardless of what TBAA says
; about the two not aliasing!
; CHECK: li [[REG:[0-9]+]], 0
; CHECK: std [[REG]], -[[OFF:[0-9]+]](1)
; CHECK: stw 3, -[[OFF]](1)
; CHECK: blr
}

!0 = metadata !{ metadata !"root" }
!1 = metadata !{ metadata !"set1", metadata !0 }
!2 = metadata !{ metadata !"set2", metadata !0 }


; RUN: llvm-as %s -o - | llvm-nm - | FileCheck %s

; We should technically emit an unmangled reference to f here,
; but no existing linker needs this.

; XFAIL: *

target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"

; CHECK: U f

declare dllimport void @f()
@fp = constant void ()* @f


Test that a call to a trampoline is turned into a call to the underlying nested function.

; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {call i32 @f}

	%struct.FRAME.nest = type { i32, i32 (i32)* }
	%struct.__builtin_trampoline = type { [10 x i8] }

declare i8* @llvm.init.trampoline(i8*, i8*, i8*)

declare i32 @f(%struct.FRAME.nest* nest , i32 )

define i32 @nest(i32 %n) {
entry:
	%FRAME.0 = alloca %struct.FRAME.nest, align 8		; <%struct.FRAME.nest*> [#uses=3]
	%TRAMP.216 = alloca [10 x i8], align 16		; <[10 x i8]*> [#uses=1]
	%TRAMP.216.sub = getelementptr [10 x i8]* %TRAMP.216, i32 0, i32 0		; <i8*> [#uses=1]
	%tmp3 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 0		; <i32*> [#uses=1]
	store i32 %n, i32* %tmp3, align 8
	%FRAME.06 = bitcast %struct.FRAME.nest* %FRAME.0 to i8*		; <i8*> [#uses=1]
	%tramp = call i8* @llvm.init.trampoline( i8* %TRAMP.216.sub, i8* bitcast (i32 (%struct.FRAME.nest* nest , i32)* @f to i8*), i8* %FRAME.06 )		; <i8*> [#uses=1]
	%tmp7 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 1		; <i32 (i32)**> [#uses=1]
	%tmp89 = bitcast i8* %tramp to i32 (i32)*		; <i32 (i32)*> [#uses=2]
	store i32 (i32)* %tmp89, i32 (i32)** %tmp7, align 8
	%tmp2.i = call i32 %tmp89( i32 1 )		; <i32> [#uses=1]
	ret i32 %tmp2.i
}


; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64

%destTy = type { i2, i2 }

define void @crash(i64 %x0, i64 %y0, %destTy* nocapture %dest) nounwind {
; X86-LABEL: crash:
; X86:       # BB#0:
; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    movb {{[0-9]+}}(%esp), %dl
; X86-NEXT:    andb $3, %dl
; X86-NEXT:    movb %dl, (%ecx)
; X86-NEXT:    andb $3, %al
; X86-NEXT:    movb %al, (%ecx)
; X86-NEXT:    retl
;
; X64-LABEL: crash:
; X64:       # BB#0:
; X64-NEXT:    andl $3, %esi
; X64-NEXT:    movb %sil, (%rdx)
; X64-NEXT:    andl $3, %edi
; X64-NEXT:    movb %dil, (%rdx)
; X64-NEXT:    retq
  %x1 = trunc i64 %x0 to i2
  %y1 = trunc i64 %y0 to i2
  %1 = bitcast %destTy* %dest to <2 x i2>*
  %2 = insertelement <2 x i2> undef, i2 %x1, i32 0
  %3 = insertelement <2 x i2> %2, i2 %y1, i32 1
  store <2 x i2> %3, <2 x i2>* %1, align 1
  ret void
}


Test from Dhrystone to make sure that we're not emitting an aligned load for a string that's aligned at 8-bytes instead of 16-bytes.

; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=dynamic-no-pic | not grep {movaps\t_.str3}
; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=dynamic-no-pic | FileCheck %s

@.str1 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 8
@.str3 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, 2'ND STRING\00", align 8

define void @func() nounwind ssp {
entry:
  %String2Loc = alloca [31 x i8], align 1
  br label %bb

bb:
  %String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0
  call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1)
; CHECK: movups _.str3
  br label %bb

return:
  ret void
}

declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind

; CHECK: .align  3
; CHECK-NEXT: _.str1:
; CHECK-NEXT: .asciz "DHRYSTONE PROGRAM, SOME STRING"
; CHECK-NEXT: .align 3
; CHECK-NEXT: _.str3:


Add a regression test for the recent fix for FP_TO_UINT lowering in the ppc backend.

; RUN: llvm-as < %s | llc -march=ppc32 | grep fctiwz | wc -l | grep 1

implementation

ushort %foo(float %a) {
entry:
        %tmp.1 = cast float %a to ushort
        ret ushort %tmp.1
}


Add testcase for post-increment store instructions.

; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s

; Check that post-increment store instructions are being generated.
; CHECK: memw(r{{[0-9]+}}{{ *}}++{{ *}}#4{{ *}}){{ *}}={{ *}}r{{[0-9]+}}

define i32 @sum(i32* nocapture %a, i16* nocapture %b, i32 %n) nounwind {
entry:
  br label %for.body

for.body:                                         ; preds = %for.body, %entry
  %lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 10, %entry ]
  %arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
  %arrayidx1.phi = phi i16* [ %b, %entry ], [ %arrayidx1.inc, %for.body ]
  %0 = load i32* %arrayidx.phi, align 4
  %1 = load i16* %arrayidx1.phi, align 2
  %conv = sext i16 %1 to i32
  %factor = mul i32 %0, 2
  %add3 = add i32 %factor, %conv
  store i32 %add3, i32* %arrayidx.phi, align 4

  %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
  %arrayidx1.inc = getelementptr i16* %arrayidx1.phi, i32 1
  %lsr.iv.next = add i32 %lsr.iv, -1
  %exitcond = icmp eq i32 %lsr.iv.next, 0
  br i1 %exitcond, label %for.end, label %for.body

for.end:                                          ; preds = %for.body
  ret i32 0
}


Debug Info: Fix the SDLoc propagation for a DAGCombiner rule

; RUN: llc -O0 < %s -mtriple=x86_64-unknown | FileCheck %s
; This was extracted from a swift debugger stepping testcase and checks that the
;   fold (zext (load x)) -> (zext (truncate (zextload x)))
; rule propagates the SDLoc of the load to the zextload.

; CHECK: .loc {{.*}} main.swift:100
; CHECK-NOT: .loc
; CHECK: .loc {{.*}} main.swift:200
; CHECK-NOT: .loc
; CHECK: .loc {{.*}} main.swift:300
; CHECK-NOT: .loc
declare void @foo(double)

define i32 @zext_load(i32* %arg) !dbg !30 {
  %1 = bitcast i32* %arg to i8*
  %2 = getelementptr inbounds i8, i8* %1, i32 1
  %3 = load i8, i8* %2, align 1, !dbg !100
  %4 = uitofp i8 %3 to double, !dbg !200
  call void @foo(double %4), !dbg !200
  %5 = zext i8 %3 to i32, !dbg !300
  ret i32 %5
}
!llvm.dbg.cu = !{!1}
!llvm.module.flags = !{!0}

!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !3, isOptimized: false, emissionKind: FullDebug)
!2 = !DIModule(scope: null, name: "test", includePath: "", isysroot: "/")
!3 = !DIFile(filename: "main.swift", directory: "/")

!30 = distinct !DISubprogram(name: "main", scope: !2, file: !3, line: 1, type: !31, isLocal: false, isDefinition: true, isOptimized: false, unit: !1)
!31 = !DISubroutineType(types: !32)
!32 = !{}

!100 = !DILocation(line: 100, scope: !30)
!200 = !DILocation(line: 200, scope: !30)
!300 = !DILocation(line: 300, scope: !30)


Add a test for LowerInvoke that doesn't use "-enable-correct-eh-support"

; RUN: opt < %s -lowerinvoke -S | FileCheck %s

declare i32 @external_func(i64 %arg)

define i32 @invoke_test(i64 %arg) {
entry:
  %result = invoke fastcc i32 @external_func(i64 inreg %arg)
      to label %cont unwind label %lpad
cont:
  ret i32 %result
lpad:
  %phi = phi i32 [ 99, %entry ]
  %lp = landingpad { i8*, i32 } personality i8* null cleanup
  ret i32 %phi
}

; The "invoke" should be converted to a "call".
; CHECK-LABEL: define i32 @invoke_test
; CHECK: %result = call fastcc i32 @external_func(i64 inreg %arg)
; CHECK-NEXT: br label %cont

; Note that this pass does not remove dead landingpad blocks.
; CHECK: lpad:
; CHECK-NOT: phi
; CHECK: landingpad


; RUN: not llc -mtriple=riscv32 < %s 2>&1 | FileCheck %s
; RUN: not llc -mtriple=riscv64 < %s 2>&1 | FileCheck %s

define void @constraint_I() {
; CHECK: error: invalid operand for inline asm constraint 'I'
  tail call void asm sideeffect "addi a0, a0, $0", "I"(i32 2048)
; CHECK: error: invalid operand for inline asm constraint 'I'
  tail call void asm sideeffect "addi a0, a0, $0", "I"(i32 -2049)
  ret void
}

define void @constraint_J() {
; CHECK: error: invalid operand for inline asm constraint 'J'
  tail call void asm sideeffect "addi a0, a0, $0", "J"(i32 1)
  ret void
}

define void @constraint_K() {
; CHECK: error: invalid operand for inline asm constraint 'K'
  tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 32)
; CHECK: error: invalid operand for inline asm constraint 'K'
  tail call void asm sideeffect "csrwi mstatus, $0", "K"(i32 -1)
  ret void
}


Add a dedicated test case for the issue fixed in r292770.

; Test that the inliner clears analyses which may hold references to function
; bodies when it decides to delete them after inlining the last caller.
; We check this by using correlated-propagation to populate LVI with basic
; block references that would dangle if we failed to clear the inlined function
; body.
;
; RUN: opt -debug-pass-manager -S < %s 2>&1 \
; RUN:     -passes='cgscc(inline,function(correlated-propagation))' \
; RUN:     | FileCheck %s
;
; CHECK-LABEL: Starting llvm::Module pass manager run.
; CHECK: Running pass: InlinerPass on (callee)
; CHECK: Running pass: CorrelatedValuePropagationPass on callee
; CHECK: Running analysis: LazyValueAnalysis
; CHECK: Running pass: InlinerPass on (caller)
; CHECK: Clearing all analysis results for: callee
; CHECK: Running pass: CorrelatedValuePropagationPass on caller
; CHECK: Running analysis: LazyValueAnalysis

define internal i32 @callee(i32 %x) {
; CHECK-NOT: @callee
entry:
  ret i32 %x
}

define i32 @caller(i32 %x) {
; CHECK-LABEL: define i32 @caller
entry:
  %call = call i32 @callee(i32 %x)
; CHECK-NOT: call
  ret i32 %call
; CHECK: ret i32 %x
}


Add test case missing from r259357 (NFC)

; RUN: opt -S -slp-vectorizer < %s | FileCheck %s

target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"

; This test ensures that we do not regress due to PR26364. The vectorizer
; should not compute a smaller size for %k.13 since it is in a use-def cycle
; and cannot be demoted.
;
; CHECK-LABEL: @PR26364
; CHECK: %k.13 = phi i32
;
define fastcc void @PR26364() {
entry:
  br i1 undef, label %for.end11, label %for.cond4

for.cond4:
  %k.13 = phi i32 [ undef, %entry ], [ %k.3, %for.cond4 ]
  %e.02 = phi i32 [ 1, %entry ], [ 0, %for.cond4 ]
  %e.1 = select i1 undef, i32 %e.02, i32 0
  %k.3 = select i1 undef, i32 %k.13, i32 undef
  br label %for.cond4

for.end11:
  ret void
}


; RUN: llvm-as < %s | llc | grep lea

	%struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
	%struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
	%struct.node = type { i16, double, [3 x double], i32, i32 }

define fastcc void @old_main() {
entry:
	%tmp44 = malloc %struct.anon		; <%struct.anon*> [#uses=2]
	store double 4.000000e+00, double* null, align 4
	br label %bb41

bb41:		; preds = %uniform_testdata.exit, %entry
	%i.0110 = phi i32 [ 0, %entry ], [ %tmp48, %uniform_testdata.exit ]		; <i32> [#uses=2]
	%tmp48 = add i32 %i.0110, 1		; <i32> [#uses=1]
	br i1 false, label %uniform_testdata.exit, label %bb33.preheader.i

bb33.preheader.i:		; preds = %bb41
	ret void

uniform_testdata.exit:		; preds = %bb41
	%tmp57 = getelementptr %struct.anon* %tmp44, i32 0, i32 3, i32 %i.0110		; <%struct.bnode**> [#uses=1]
	store %struct.bnode* null, %struct.bnode** %tmp57, align 4
	br i1 false, label %bb154, label %bb41

bb154:		; preds = %bb154, %uniform_testdata.exit
	br i1 false, label %bb166, label %bb154

bb166:		; preds = %bb154
	%tmp169 = getelementptr %struct.anon* %tmp44, i32 0, i32 3, i32 0		; <%struct.bnode**> [#uses=0]
	ret void
}


Add a regression test for folding spill code into scalar min and max.

; RUN: llvm-as < %s | llc -march=x86-64 | grep min | wc -l | grep 1
; RUN: llvm-as < %s | llc -march=x86-64 | grep max | wc -l | grep 1
; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | wc -l | grep 2

declare float @bar()

define float @foo(float %a)
{
  %s = call float @bar()
  %t = fcmp olt float %s, %a
  %u = select i1 %t, float %s, float %a
  ret float %u
}
define float @hem(float %a)
{
  %s = call float @bar()
  %t = fcmp uge float %s, %a
  %u = select i1 %t, float %s, float %a
  ret float %u
}


; Test linking two functions with different prototypes and two globals
; in different modules.
; RUN: llvm-as %s -o %t.bar.bc -f
; RUN: echo "define i32* @foo(i32 %x) { ret i32* @baz } @baz = external global i32" | \
; RUN:   llvm-as -o %t.foo.bc -f
; RUN: llvm-link %t.bar.bc %t.foo.bc -o %t.bc
; RUN: llvm-link %t.foo.bc %t.bar.bc -o %t.bc
declare i32* @foo(...)
define i32* @bar() {
	%ret = call i32* (...)* @foo( i32 123 )
	ret i32* %ret
}
@baz = global i32 0


Test that large absolute addresses are properly folded into addr modes on both ppc32 and ppc64.

; RUN: llvm-as < %s | llc -march=ppc32 | grep 'stw r3, 32751' &&
; RUN: llvm-as < %s | llc -march=ppc64 | grep 'stw r3, 32751' &&
; RUN: llvm-as < %s | llc

define void @test() {
	store i32 0, i32* inttoptr (i64 48725999 to i32*)
	ret void
}


; RUN: llc < %s -relocation-model=pic | FileCheck %s
; PR15250

target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"

declare void @callee1(i32 inreg, i32 inreg, i32 inreg)
define void @test1(i32 %a, i32 %b) nounwind {
; CHECK: test1:
; CHECK: calll callee1@PLT
  tail call void @callee1(i32 inreg 0, i32 inreg 0, i32 inreg 0) nounwind
  ret void
}


Add test case for PR30290s failing behaviour

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=btver2 %s -o - | FileCheck %s
; Test desc: two functions (foo, bar) with byval arguments, should not have
; reads/writes from/to byval storage re-ordered.
; When broken, five "1" constants are written into the byval %struct.face,
; but the subsequent byval read of that struct (call to bar) gets re-ordered
; before those writes, illegally.
;
; FIXME: the output shown below is the broken output of llc, "movl $1" is
; scheduled after the copy between byval arguments starts. This will be fixed
; with the patch in review D45022.
source_filename = "test.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"

%struct.face = type { [7 x i32] }

; Function Attrs: noinline nounwind uwtable
declare void @bar(%struct.face* byval nocapture readonly align 8);

; Function Attrs: noinline nounwind uwtable
define void @foo(%struct.face* byval nocapture align 8) local_unnamed_addr {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    subq $40, %rsp
; CHECK-NEXT:    .cfi_def_cfa_offset 48
; CHECK-NEXT:    vmovaps {{.*#+}} xmm0 = [1,1,1,1]
; CHECK-NEXT:    vmovaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovups {{[0-9]+}}(%rsp), %xmm0
; CHECK-NEXT:    movl $1, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovups %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0
; CHECK-NEXT:    vmovups %xmm0, (%rsp)
; CHECK-NEXT:    callq bar
; CHECK-NEXT:    addq $40, %rsp
; CHECK-NEXT:    .cfi_def_cfa_offset 8
; CHECK-NEXT:    retq
  %2 = bitcast %struct.face* %0 to <4 x i32>*
  store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %2, align 8
  %3 = getelementptr inbounds %struct.face, %struct.face* %0, i64 0, i32 0, i64 4
  store i32 1, i32* %3, align 8
  call void @bar(%struct.face* byval nonnull align 8 %0)
  ret void
}


Add missing test case for llvm.eh.exceptioncode

; RUN: llc < %s | FileCheck %s

target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"

declare void @f(i32)
declare i32 @__C_specific_handler(...)
declare i32 @llvm.eh.exceptioncode(token)

define void @ehcode() personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
entry:
  invoke void @f(i32 0)
          to label %__try.cont unwind label %catch.dispatch

catch.dispatch:                                   ; preds = %entry
  %pad = catchpad [i8* null]
          to label %__except unwind label %catchendblock

__except:                                         ; preds = %catch.dispatch
  catchret %pad to label %__except.1

__except.1:                                       ; preds = %__except
  %code = call i32 @llvm.eh.exceptioncode(token %pad)
  call void @f(i32 %code)
  br label %__try.cont

__try.cont:                                       ; preds = %entry, %__except.1
  ret void

catchendblock:                                    ; preds = %catch.dispatch
  catchendpad unwind to caller
}

; CHECK-LABEL: ehcode:
; CHECK: xorl %ecx, %ecx
; CHECK: callq f
; CHECK: retq

; CHECK: # %__except
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: callq f


Add a testcase for r220302: Fix coalescing benefits

; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a57 -mattr=+neon -fp-contract=fast -regalloc=pbqp -pbqp-coalescing | FileCheck %s

; CHECK-LABEL: test:
define i32 @test(i32 %acc, i32* nocapture readonly %c) {
entry:
  %0 = load i32* %c, align 4
; CHECK-NOT: mov	 w{{[0-9]*}}, w0
  %add = add nsw i32 %0, %acc
  %arrayidx1 = getelementptr inbounds i32* %c, i64 1
  %1 = load i32* %arrayidx1, align 4
  %add2 = add nsw i32 %add, %1
  ret i32 %add2
}


; RUN: llc -march=arm -mattr=+neon < %s
; Radar 7770501: Don't crash on SELECT and SELECT_CC with NEON vector values.

define arm_apcscc void @vDSP_FFT16_copv(float* nocapture %O, float* nocapture %I, i32 %Direction) nounwind {
entry:
  %.22 = select i1 undef, <4 x float> undef, <4 x float> zeroinitializer ; <<4 x float>> [#uses=1]
  %0 = fadd <4 x float> undef, %.22               ; <<4 x float>> [#uses=1]
  %1 = fsub <4 x float> %0, undef                 ; <<4 x float>> [#uses=1]
  %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> ; <<4 x float>> [#uses=1]
  %3 = shufflevector <4 x float> undef, <4 x float> %2, <4 x i32> <i32 2, i32 3, i32 6, i32 7> ; <<4 x float>> [#uses=1]
  %4 = fmul <4 x float> %3, <float 0.000000e+00, float 0x3FED906BC0000000, float 0x3FE6A09E60000000, float 0xBFD87DE2A0000000> ; <<4 x float>> [#uses=1]
  %5 = fadd <4 x float> undef, %4                 ; <<4 x float>> [#uses=1]
  %6 = fadd <4 x float> undef, %5                 ; <<4 x float>> [#uses=1]
  %7 = fadd <4 x float> undef, %6                 ; <<4 x float>> [#uses=1]
  br i1 undef, label %bb4, label %bb3

bb3:                                              ; preds = %entry
  %8 = shufflevector <4 x float> undef, <4 x float> %7, <4 x i32> <i32 2, i32 6, i32 3, i32 7> ; <<4 x float>> [#uses=0]
  ret void

bb4:                                              ; preds = %entry
  ret void
}


Add test for sinking inline asm in if/else

; RUN: opt < %s -simplifycfg -S | FileCheck %s

define i32 @test(i32 %x) {
; CHECK-LABEL: @test
entry:
  %y = alloca i32, align 4
  %tobool = icmp ne i32 %x, 0
  br i1 %tobool, label %if.then, label %if.else

if.then:
; CHECK-LABEL: if.then:
; CHECK: [[ASM1:%.*]] = call i32 asm "mov $0, #1", "=r"()
  %tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone
  store i32 %tmp1, i32* %y, align 4
  br label %if.end

if.else:
; CHECK-LABEL: if.else:
; CHECK: [[ASM2:%.*]] = call i32 asm "mov $0, #2", "=r"()
  %tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone
  store i32 %tmp2, i32* %y, align 4
  br label %if.end

if.end:
; CHECK-LABEL: if.end:
; CHECK: {{%.*}} = phi i32 [ [[ASM2]], %if.else ], [ [[ASM1]], %if.then ]
  %tmp3 = load i32, i32* %y, align 4
  ret i32 %tmp3
}


; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX

define float @pr26491(<4 x float> %a0) {
; SSE2-LABEL: pr26491:
; SSE2:       # %bb.0:
; SSE2-NEXT:    movaps %xmm0, %xmm1
; SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT:    addps %xmm0, %xmm1
; SSE2-NEXT:    movaps %xmm1, %xmm0
; SSE2-NEXT:    movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE2-NEXT:    addss %xmm1, %xmm0
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: pr26491:
; SSSE3:       # %bb.0:
; SSSE3-NEXT:    movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSSE3-NEXT:    addps %xmm0, %xmm1
; SSSE3-NEXT:    movaps %xmm1, %xmm0
; SSSE3-NEXT:    movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSSE3-NEXT:    addss %xmm1, %xmm0
; SSSE3-NEXT:    retq
;
; AVX-LABEL: pr26491:
; AVX:       # %bb.0:
; AVX-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
; AVX-NEXT:    vaddps %xmm0, %xmm1, %xmm0
; AVX-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; AVX-NEXT:    vaddss %xmm0, %xmm1, %xmm0
; AVX-NEXT:    retq
  %1 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
  %2 = fadd <4 x float> %1, %a0
  %3 = extractelement <4 x float> %2, i32 2
  %4 = extractelement <4 x float> %2, i32 0
  %5 = fadd float %3, %4
  ret float %5
}


Test that __stack_chk_{guard, fail} are not internalized.

; __stack_chk_guard and __stack_chk_fail should not be internalized.
; RUN: opt < %s -internalize -S | FileCheck %s
; RUN: opt < %s -passes=internalize -S | FileCheck %s

; CHECK: @__stack_chk_guard = hidden global [8 x i64] zeroinitializer, align 16
@__stack_chk_guard = hidden global [8 x i64] zeroinitializer, align 16

; CHECK: @__stack_chk_fail = hidden global [8 x i64] zeroinitializer, align 16
@__stack_chk_fail = hidden global [8 x i64] zeroinitializer, align 16


Make sure mul by constant 5 is turned into a s4addq

; Make sure this testcase does not use mulq
; RUN: llvm-as < %s | llc -march=alpha | grep -i 'mul' |wc -l |grep 0

implementation   ; Functions:

ulong %foo(ulong %x) {
entry:
	%tmp.1 = mul ulong %x, 5		; <ulong> [#uses=1]
	ret ulong %tmp.1
}

long %bar(long %x) {
entry:
	%tmp.1 = mul long %x, 5		; <long> [#uses=1]
	ret long %tmp.1
}


Add xfail test for PR24755 (uselistorder)

; RUN: verify-uselistorder %s
; XFAIL: *

; Test 1
@g1 = global i8 0

declare void @llvm.donothing() nounwind readnone

define void @f.no_personality1() personality i8 0 {
  invoke void @llvm.donothing() to label %normal unwind label %exception
exception:
  %cleanup = landingpad i8 cleanup
  br label %normal
normal:
  ret void
}

; Test 2
@g2 = global i8 -1
@g3 = global i8 -1

define void @f.no_personality2() personality i8 -1 {
  invoke void @llvm.donothing() to label %normal unwind label %exception
exception:
  %cleanup = landingpad i8 cleanup
  br label %normal
normal:
  ret void
}

; Test 3
declare void @f1() prefix i32 1

define void @test1() {
  %t1 = alloca half  ; Implicit i32 1 used here.
  %t2 = alloca float
  ret void
}

; Test 4
declare void @f2() prefix i32 2

define void @test2(i32* %word) {
  %cmpxchg.0 = cmpxchg i32* %word, i32 0, i32 2 monotonic monotonic
  %cmpxchg.1 = cmpxchg i32* %word, i32 0, i32 2 acq_rel monotonic
  ret void
}

; Test 5
@g4 = global i32 3
@g5 = global i32 3
declare void @test3() prefix i32 3

; Test 6
@g6 = global i32 4
@g7 = global i32 4
declare void @c() prologue i32 4


; RUN: llc < %s -march=mipsel | FileCheck %s

@g1 = external global i32

define i32 @foo0(i32 %s) nounwind readonly {
entry:
; CHECK-NOT: addiu
; CHECK:     movn
  %tobool = icmp ne i32 %s, 0
  %0 = load i32* @g1, align 4, !tbaa !0
  %cond = select i1 %tobool, i32 0, i32 %0
  ret i32 %cond
}

define i32 @foo1(i32 %s) nounwind readonly {
entry:
; CHECK-NOT: addiu
; CHECK:     movz
  %tobool = icmp ne i32 %s, 0
  %0 = load i32* @g1, align 4, !tbaa !0
  %cond = select i1 %tobool, i32 %0, i32 0
  ret i32 %cond
}

!0 = metadata !{metadata !"int", metadata !1}
!1 = metadata !{metadata !"omnipotent char", metadata !2}
!2 = metadata !{metadata !"Simple C/C++ TBAA", null}


Test case for r139453, WidenIV::GetExtendedOperandRecurrence.

; RUN: opt < %s -indvars -disable-iv-rewrite -S | FileCheck %s
; Test WidenIV::GetExtendedOperandRecurrence.
; add219 should be extended to i64 because it is nsw, even though its
; sext cannot be hoisted outside the loop.

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

define void @test() nounwind {
entry:
  br i1 undef, label %for.body11, label %for.end285

for.body11:                                       ; preds = %entry
  %shl = shl i32 1, 1
  %shl132 = shl i32 %shl, 1
  br label %for.body153

for.body153:                                      ; preds = %for.body153, %for.body11
  br i1 undef, label %for.body170, label %for.body153

; CHECK: add nsw i64 %indvars.iv, 1
for.body170:                                      ; preds = %for.body170, %for.body153
  %i2.19 = phi i32 [ %add249, %for.body170 ], [ undef, %for.body153 ]
  %add219 = add nsw i32 %i2.19, 1
  %idxprom220 = sext i32 %add219 to i64
  %add249 = add nsw i32 %i2.19, %shl132
  br label %for.body170

for.end285:                                       ; preds = %entry
  ret void
}


Add a testcase to check that debug info is upgraded when compiling LLVM IR through clang.

; REQUIRES: x86-registered-target
; RUN: %clang_cc1 -triple i386-apple-darwin -disable-llvm-optzns -S %s -o - 2>&1 \
; RUN:   | FileCheck %s
; CHECK: invalid global variable ref
; CHECK: warning: ignoring invalid debug info in {{.*}}.ll

@global = common global i32 0, align 4, !dbg !2

!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!5, !6}

!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "adrian", emissionKind: FullDebug, globals: !{!3})
!1 = !DIFile(filename: "broken.c", directory: "/")
!2 = !DIGlobalVariableExpression(var: !3, expr: !DIExpression())
!3 = !DIGlobalVariable(name: "g", scope: !0, file: !1, line: 1, type: !1, isLocal: false, isDefinition: true)
!5 = !{i32 2, !"Dwarf Version", i32 4}
!6 = !{i32 1, !"Debug Info Version", i32 3}


Verify that jump tables are emitted to the same section as the function is, when codegen'ing in pic mode. This fixes a miscompilation of a switch stmt in a template, as the template goes to a non-.text section.

; RUN: llvm-as < %s | llc -relocation-model=pic -march=x86 | not grep -F .text
target endian = little
target pointersize = 32
target triple = "i386-linux-gnu"

implementation   ; Functions:

declare void %_Z3bari( int  )

linkonce void %_Z3fooILi1EEvi(int %Y) {
entry:
	%Y_addr = alloca int		; <int*> [#uses=2]
	"alloca point" = cast int 0 to int		; <int> [#uses=0]
	store int %Y, int* %Y_addr
	%tmp = load int* %Y_addr		; <int> [#uses=1]
	switch int %tmp, label %bb10 [
		 int 0, label %bb3
		 int 1, label %bb
		 int 2, label %bb
		 int 3, label %bb
		 int 4, label %bb
		 int 5, label %bb
		 int 6, label %bb
		 int 7, label %bb
		 int 8, label %bb
		 int 9, label %bb
		 int 10, label %bb
		 int 12, label %bb1
		 int 13, label %bb5
		 int 14, label %bb6
		 int 16, label %bb2
		 int 17, label %bb4
		 int 23, label %bb8
		 int 27, label %bb7
		 int 34, label %bb9
	]

bb:		; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
	br label %bb1

bb1:		; preds = %bb, %entry
	br label %bb2

bb2:		; preds = %bb1, %entry
	call void %_Z3bari( int 1 )
	br label %bb11

bb3:		; preds = %entry
	br label %bb4

bb4:		; preds = %bb3, %entry
	br label %bb5

bb5:		; preds = %bb4, %entry
	br label %bb6

bb6:		; preds = %bb5, %entry
	call void %_Z3bari( int 2 )
	br label %bb11

bb7:		; preds = %entry
	br label %bb8

bb8:		; preds = %bb7, %entry
	br label %bb9

bb9:		; preds = %bb8, %entry
	call void %_Z3bari( int 3 )
	br label %bb11

bb10:		; preds = %entry
	br label %bb11

bb11:		; preds = %bb10, %bb9, %bb6, %bb2
	br label %return

return:		; preds = %bb11
	ret void
}


Add a test case for _Complex passed as a FCA.

; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2

define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
entry:
	%z8 = extractvalue { x86_fp80, x86_fp80 } %z, 0
	%z9 = extractvalue { x86_fp80, x86_fp80 } %z, 1
	%0 = sub x86_fp80 0xK80000000000000000000, %z9
	%insert = insertvalue { x86_fp80, x86_fp80 } undef, x86_fp80 %0, 0
	%insert7 = insertvalue { x86_fp80, x86_fp80 } %insert, x86_fp80 %z8, 1
	call void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %insert7) nounwind
	ret void
}

declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret, { x86_fp80, x86_fp80 }) nounwind


; Test moves between FPRs and GPRs for z196 and above.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check that moves from i32s to floats can use high registers.
define float @f1(i16 *%ptr) {
; CHECK-LABEL: f1:
; CHECK: llhh [[REG:%r[0-5]]], 0(%r2)
; CHECK: oihh [[REG]], 16256
; CHECK: ldgr %f0, [[REG]]
; CHECK: br %r14
  %base = load i16 *%ptr
  %ext = zext i16 %base to i32
  %full = or i32 %ext, 1065353216
  %res = bitcast i32 %full to float
  ret float %res
}

; Check that moves from floats to i32s can use high registers.
; This "store the low byte" technique is used by llvmpipe, for example.
define void @f2(float %val, i8 *%ptr) {
; CHECK-LABEL: f2:
; CHECK: lgdr [[REG:%r[0-5]]], %f0
; CHECK: stch [[REG]], 0(%r2)
; CHECK: br %r14
  %res = bitcast float %val to i32
  %trunc = trunc i32 %res to i8
  store i8 %trunc, i8 *%ptr
  ret void
}


Add a testcase of llvm-lto error handling.

; RUN: not llvm-lto %S/../Bitcode/invalid.ll.bc 2>&1 | FileCheck %s

; CHECK: llvm-lto{{.*}}: error loading file '{{.*}}/../Bitcode/invalid.ll.bc': Invalid value


Add testcase accidentally left out from r323460.

; Test to check the callgraph in summary
; RUN: opt -write-relbf-to-summary -module-summary %s -o %t.o
; RUN: llvm-bcanalyzer -dump %t.o | FileCheck %s

; CHECK: <SOURCE_FILENAME
; CHECK-NEXT: <GLOBALVAR
; CHECK-NEXT: <FUNCTION
; "func"
; CHECK-NEXT: <FUNCTION op0=17 op1=4
; CHECK:       <GLOBALVAL_SUMMARY_BLOCK
; CHECK-NEXT:    <VERSION
; See if the call to func is registered.
; CHECK-NEXT:    <PERMODULE_RELBF {{.*}} op4=1 {{.*}} op7=1
; CHECK-NEXT:  </GLOBALVAL_SUMMARY_BLOCK>
; CHECK: <STRTAB_BLOCK
; CHECK-NEXT: blob data = 'undefinedglobmainfunc{{.*}}'

; ModuleID = 'thinlto-function-summary-callgraph.ll'
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define i32 @main() #0 {
entry:
    call void (...) @func()
    %u = load i32, i32* @undefinedglob
    ret i32 %u
}

declare void @func(...) #1
@undefinedglob = external global i32

; OLD: Index {{.*}} contains 1 nodes (1 functions, 0 alias, 0 globals) and 1 edges (0 refs and 1 calls)


Test for r242395 (Fix emitPrologue() to make less assumptions about pushes)

; RUN: llc < %s | FileCheck %s

target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc18.0.0"

declare x86_thiscallcc void @bar(i32 %a, i32 %b)

define fastcc void @foo(i32 %a, i32 %b) #0 {
; CHECK-LABEL: foo:
; CHECK: subl $64, %esp
; CHECK-NEXT: pushl
; CHECK-NEXT: calll _bar
  %local = alloca i32, i32 16
  call x86_thiscallcc void @bar(i32 %a, i32 %b)
  call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di}"()
  ret void
}

attributes #0 = { nounwind optsize "no-frame-pointer-elim-non-leaf"}


; LoopInfo is incorrectly calculating loop nesting!  In this case it doesn't
; figure out that loop "Inner" should be nested inside of leep "LoopHeader",
; and instead nests it just inside loop "Top"
;
; RUN: analyze -loops %s | grep '     Loop Containing: label %Inner'
;

implementation

void %test() {
	br label %Top
Top:
	br label %LoopHeader
Next:
	br bool false, label %Inner, label %Out
Inner:
	br bool false, label %Inner, label %LoopHeader

LoopHeader:
	br label %Next

Out:
	br bool false, label %Top, label %Done

Done:
	ret void
}


Test that we can reassociate (x<<1)+(y<<1) -> (X+Y)<<1.

; There should be exactly one shift and one add left.
; RUN: llvm-as < %s | opt -reassociate -instcombine | llvm-dis | grep shl | wc -l | grep 1 &&
; RUN: llvm-as < %s | opt -reassociate -instcombine | llvm-dis | grep add | wc -l | grep 1

int %test(int %X, int %Y) {
        %tmp.2 = shl int %X, ubyte 1            ; <int> [#uses=1]
        %tmp.6 = shl int %Y, ubyte 1            ; <int> [#uses=1]
        %tmp.4 = add int %tmp.6, %tmp.2         ; <int> [#uses=1]
        ret int %tmp.4
}


; This test checks that we instrument regular globals, but do not touch
; the COMDAT ones.
; RUN: opt < %s -asan -asan-module -S | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
; no action should be taken for these globals
$global_noinst = comdat largest
@aliasee = private unnamed_addr constant [2 x i8] [i8 1, i8 2], comdat $global_noinst
@global_noinst = unnamed_addr alias [2 x i8]* @aliasee
; CHECK-NOT: {{asan_gen.*global_noinst}}
; CHECK-DAG: @global_noinst = unnamed_addr alias [2 x i8]* @aliasee
@global_inst = private constant [2 x i8] [i8 1, i8 2]
; CHECK-DAG: {{asan_gen.*global_inst}}
; CHECK: @asan.module_ctor


; RUN: opt -basicaa -gvn -S < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc"

%eh.ThrowInfo = type { i32, i8*, i8*, i8* }
%struct.A = type { i32* }

@"_TI1?AUA@@" = external constant %eh.ThrowInfo

define i8 @f() personality i32 (...)* @__CxxFrameHandler3 {
entry:
  %b = alloca i8
  %c = alloca i8
  store i8 42, i8* %b
  store i8 13, i8* %c
  invoke void @_CxxThrowException(i8* %b, %eh.ThrowInfo* nonnull @"_TI1?AUA@@")
          to label %unreachable unwind label %catch.dispatch

catch.dispatch:                                   ; preds = %entry
  %catchpad = catchpad [i8* null, i32 64, i8* null]
          to label %catch unwind label %catchendblock

catch:                                            ; preds = %catch.dispatch
  store i8 5, i8* %b
  catchret %catchpad to label %try.cont

try.cont:                                         ; preds = %catch
  %load_b = load i8, i8* %b
  %load_c = load i8, i8* %c
  %add = add i8 %load_b, %load_c
  ret i8 %add

catchendblock:                                    ; preds = %catch.dispatch
  catchendpad unwind to caller

unreachable:                                      ; preds = %entry
  unreachable
}
; CHECK-LABEL: define i8 @f(
; CHECK:       %[[load_b:.*]] = load i8, i8* %b
; CHECK-NEXT:  %[[load_c:.*]] = load i8, i8* %c
; CHECK-NEXT:  %[[add:.*]] = add i8 %[[load_b]], %[[load_c]]
; CHECK-NEXT:  ret i8 %[[add]]

declare i32 @__CxxFrameHandler3(...)

declare x86_stdcallcc void @_CxxThrowException(i8*, %eh.ThrowInfo*)


; PR1318
; RUN: llvm-as < %s > %t.bc &&
; RUN: opt -load=%llvmlibsdir/LLVMHello%shlibext -hello \
; RUN:   -disable-output %t.bc | grep Hello

@junk = global i32 0


; RUN: llvm-as < %s | opt -prune-eh | llvm-dis | not grep 'ret int'

void %noreturn() {
	unwind
}

int %caller() {
	 ; noreturn never returns, so the ret is unreachable.
	call void %noreturn()
	ret int 17
}

int %caller2() {
	%T = call int %caller()
	ret int %T            ;; this is also unreachable!
}


implementation

int "loop test"(int %i, int %j)
begin
	%whichLoop = setlt int %i, %j
	br bool %whichLoop, label %Loop1Header, label %Loop2Header

Loop1Header:
	%i1 = add int 0, 0             ; %i1 = 0
	br label %L1Top
L1Top:
	%i2 = phi int [%i1, %Loop1Header], [%i3, %L1Body]
	%L1Done = seteq int %i2, %j
	br bool %L1Done, label %L1End, label %L1Body
L1Body:
	%i3 = add int %i2, 2
	br label %L1Top
L1End:
	%v0 = add int %i2, %j         ; %v0 = 3 * %j
	br label %Merge

Loop2Header:
	%m1 = add int 0, 0
	%k1 = add int 0, %i
	br label %L2Top
L2Top:
	%k2 = phi int [%k1, %Loop2Header], [%k3, %L2Body]
	%m2 = phi int [%m1, %Loop2Header], [%m3, %L2Body]
	%L2Done = seteq int %k2, 0
	br bool %L2Done, label %L2End, label %L2Body
L2Body:
	%k3 = sub int %k2, 1
	%m3 = add int %m2, %j
	br label %L2Top
L2End:
	%v1 = add int %m2, %k2
	br label %Merge

Merge:
	%v2 = phi int [%v0, %L1End], [%v1, %L2End]
	ret int %v2
end


Add an explicit test of the auto-upgrade functionality for the new intrinsic syntax.

; Test to make sure intrinsics are automatically upgraded.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s

declare i8 @llvm.ctlz.i8(i8)
declare i16 @llvm.ctlz.i16(i16)
declare i32 @llvm.ctlz.i32(i32)
declare i42 @llvm.ctlz.i42(i42)  ; Not a power-of-2

define void @test.ctlz(i8 %a, i16 %b, i32 %c, i42 %d) {
; CHECK: @test.ctlz

entry:
  ; CHECK: call i8 @llvm.ctlz.i8(i8 %a, i1 false)
  call i8 @llvm.ctlz.i8(i8 %a)
  ; CHECK: call i16 @llvm.ctlz.i16(i16 %b, i1 false)
  call i16 @llvm.ctlz.i16(i16 %b)
  ; CHECK: call i32 @llvm.ctlz.i32(i32 %c, i1 false)
  call i32 @llvm.ctlz.i32(i32 %c)
  ; CHECK: call i42 @llvm.ctlz.i42(i42 %d, i1 false)
  call i42 @llvm.ctlz.i42(i42 %d)

  ret void
}

declare i8 @llvm.cttz.i8(i8)
declare i16 @llvm.cttz.i16(i16)
declare i32 @llvm.cttz.i32(i32)
declare i42 @llvm.cttz.i42(i42)  ; Not a power-of-2

define void @test.cttz(i8 %a, i16 %b, i32 %c, i42 %d) {
; CHECK: @test.cttz

entry:
  ; CHECK: call i8 @llvm.cttz.i8(i8 %a, i1 false)
  call i8 @llvm.cttz.i8(i8 %a)
  ; CHECK: call i16 @llvm.cttz.i16(i16 %b, i1 false)
  call i16 @llvm.cttz.i16(i16 %b)
  ; CHECK: call i32 @llvm.cttz.i32(i32 %c, i1 false)
  call i32 @llvm.cttz.i32(i32 %c)
  ; CHECK: call i42 @llvm.cttz.i42(i42 %d, i1 false)
  call i42 @llvm.cttz.i42(i42 %d)

  ret void
}


Add a simple testcase for garbage collection support

implementation

declare sbyte* %llvm_gc_allocate(uint)
declare void %llvm_gc_initialize()

declare void %llvm.gcroot(sbyte**, sbyte*)
declare void %llvm.gcwrite(sbyte*, sbyte**)

int %main() {
entry:
	%A = alloca sbyte*
	%B = alloca sbyte**

	call void %llvm_gc_initialize()

        ;; void *A;
	call void %llvm.gcroot(sbyte** %A, sbyte* null)

        ;; A = gcalloc(10);
	%Aptr = call sbyte* %llvm_gc_allocate(uint 10)
	store sbyte* %Aptr, sbyte** %A

        ;; void **B;
	%tmp.1 = cast sbyte*** %B to sbyte **
	call void %llvm.gcroot(sbyte** %tmp.1, sbyte* null)

	;; B = gcalloc(4);
	%B = call sbyte* %llvm_gc_allocate(uint 8)
	%tmp.2 = cast sbyte* %B to sbyte**
	store sbyte** %tmp.2, sbyte*** %B

	;; *B = A;
	%B.1 = load sbyte*** %B
	%A.1 = load sbyte** %A
	call void %llvm.gcwrite(sbyte* %A.1, sbyte** %B.1)

	br label %AllocLoop

AllocLoop:
	%i = phi uint [ 0, %entry ], [ %indvar.next, %AllocLoop ]
        ;; Allocated mem: allocated memory is immediately dead.
	call sbyte* %llvm_gc_allocate(uint 100)

	%indvar.next = add uint %i, 1
	%exitcond = seteq uint %indvar.next, 10000000
	br bool %exitcond, label %Exit, label %AllocLoop

Exit:
	ret int 0
}

declare void %__main()


; REQUIRES: shell

; This first line will generate the .o files for the next run line
; RUN: %lli_mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -enable-cache-manager %s

; This line tests MCJIT object loading
; RUN: %lli_mcjit -extra-object=%p/Inputs/multi-module-b.o -extra-object=%p/Inputs/multi-module-c.o %s

; These lines put the object files into an archive
; RUN: llvm-ar r %p/Inputs/load-object.a %p/Inputs/multi-module-b.o
; RUN: llvm-ar r %p/Inputs/load-object.a %p/Inputs/multi-module-c.o

; This line test MCJIT archive loading
; RUN: %lli_mcjit -extra-archive=%p/Inputs/load-object.a %s

; These lines clean up our temporary files
; RUN: rm -f %p/Inputs/load-object-a.o
; RUN: rm -f %p/Inputs/multi-module-b.o
; RUN: rm -f %p/Inputs/multi-module-c.o
; RUN: rm -f %p/Inputs/load-object.a

declare i32 @FB()

define i32 @main() {
  %r = call i32 @FB( )   ; <i32> [#uses=1]
  ret i32 %r
}


; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s

define i8 @test_i8(i8 %a) nounwind {
; CHECK-LABEL: test_i8:
; CHECK:       // %bb.0:
; CHECK-NEXT:  sbfx w8, w0, #7, #1
; CHECK-NEXT:  add w9, w0, w8
; CHECK-NEXT:  eor w0, w9, w8
; CHECK-NEXT:  ret
  %tmp1neg = sub i8 0, %a
  %b = icmp sgt i8 %a, -1
  %abs = select i1 %b, i8 %a, i8 %tmp1neg
  ret i8 %abs
}

define i16 @test_i16(i16 %a) nounwind {
; CHECK-LABEL: test_i16:
; CHECK:       // %bb.0:
; CHECK-NEXT:  sbfx w8, w0, #15, #1
; CHECK-NEXT:  add w9, w0, w8
; CHECK-NEXT:  eor w0, w9, w8
; CHECK-NEXT:  ret
  %tmp1neg = sub i16 0, %a
  %b = icmp sgt i16 %a, -1
  %abs = select i1 %b, i16 %a, i16 %tmp1neg
  ret i16 %abs
}

define i32 @test_i32(i32 %a) nounwind {
; CHECK-LABEL: test_i32:
; CHECK:       // %bb.0:
; CHECK-NEXT:  cmp w0, #0
; CHECK-NEXT:  cneg w0, w0, mi
; CHECK-NEXT:  ret
  %tmp1neg = sub i32 0, %a
  %b = icmp sgt i32 %a, -1
  %abs = select i1 %b, i32 %a, i32 %tmp1neg
  ret i32 %abs
}

define i64 @test_i64(i64 %a) nounwind {
; CHECK-LABEL: test_i64:
; CHECK:       // %bb.0:
; CHECK-NEXT:  cmp x0, #0
; CHECK-NEXT:  cneg x0, x0, mi
; CHECK-NEXT:  ret
  %tmp1neg = sub i64 0, %a
  %b = icmp sgt i64 %a, -1
  %abs = select i1 %b, i64 %a, i64 %tmp1neg
  ret i64 %abs
}


Add test that fails due to requiring i64 mul for pointers

; XFAIL: *
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI %s

declare i32 @llvm.SI.tid() readnone

; SI-LABEL: @test_array_ptr_calc(
define void @test_array_ptr_calc(i32 addrspace(1)* noalias %out, [16 x i32] addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) {
  %tid = call i32 @llvm.SI.tid() readnone
  %a_ptr = getelementptr [16 x i32] addrspace(1)* %inA, i32 1, i32 %tid
  %b_ptr = getelementptr i32 addrspace(1)* %inB, i32 %tid
  %a = load i32 addrspace(1)* %a_ptr
  %b = load i32 addrspace(1)* %b_ptr
  %result = add i32 %a, %b
  store i32 %result, i32 addrspace(1)* %out
  ret void
}


Add a test that shows that SSI is working correctly.

; RUN: llvm-as < %s | opt -ssi-everything | llvm-dis | FileCheck %s

declare void @use(i32)
declare i32 @create()

define i32 @foo() {
entry:
  %x = call i32 @create()
  %y = icmp slt i32 %x, 10
  br i1 %y, label %T, label %F
T:
; CHECK: SSI_sigma
  call void @use(i32 %x)
  br label %join
F:
; CHECK: SSI_sigma
  call void @use(i32 %x)
  br label %join
join:
; CHECK: SSI_phi
  ret i32 %x
}


; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s

define <vscale x 8 x half> @fadd_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
; CHECK-LABEL: fadd_h:
; CHECK: fadd z0.h, z0.h, z1.h
; CHECK-NEXT: ret
  %res = fadd <vscale x 8 x half> %a, %b
  ret <vscale x 8 x half> %res
}

define <vscale x 4 x float> @fadd_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
; CHECK-LABEL: fadd_s:
; CHECK: fadd z0.s, z0.s, z1.s
; CHECK-NEXT: ret
  %res = fadd <vscale x 4 x float> %a, %b
  ret <vscale x 4 x float> %res
}

define <vscale x 2 x double> @fadd_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
; CHECK-LABEL: fadd_d:
; CHECK: fadd z0.d, z0.d, z1.d
; CHECK-NEXT: ret
  %res = fadd <vscale x 2 x double> %a, %b
  ret <vscale x 2 x double> %res
}


; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu | FileCheck %s

; Test cases of bitcasts where one type needs to be widened and one needs to be promoted.

define <2 x i16> @bitcast_v2i16_v2f16(<2 x half> %x) {
; CHECK-LABEL: bitcast_v2i16_v2f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    sub sp, sp, #16 // =16
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    str s0, [sp, #12]
; CHECK-NEXT:    ldrh w8, [sp, #12]
; CHECK-NEXT:    ldrh w9, [sp, #14]
; CHECK-NEXT:    fmov s0, w8
; CHECK-NEXT:    mov v0.s[1], w9
; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
; CHECK-NEXT:    add sp, sp, #16 // =16
; CHECK-NEXT:    ret
  %y = bitcast <2 x half> %x to <2 x i16>
  ret <2 x i16> %y
}

define <2 x half> @bitcast_v2f16_v2i16(<2 x i16> %x) {
; CHECK-LABEL: bitcast_v2f16_v2i16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    uzp1 v0.4h, v0.4h, v0.4h
; CHECK-NEXT:    ret
  %y = bitcast <2 x i16> %x to <2 x half>
  ret <2 x half> %y
}


Check that this compiles to a label with a space in it.

; RUN: llvm-as < %s | llc | grep 'foo bar":'

target endian = big
target pointersize = 32
target triple = "powerpc-apple-darwin8.2.0"

"foo bar" = global int 4


Test case for symbol information in object file

; RUN: llc -march=bpfel -filetype=obj -o - %s | llvm-readelf --symbols | FileCheck %s

; CHECK: 0 FILE    LOCAL  DEFAULT  ABS elf-symbol-information.ll
; CHECK: 8 FUNC    GLOBAL DEFAULT    2 test_func
define void @test_func() {
entry:
  ret void
}


Test case for X86 inline asm constraint 'I'

; RUN: llvm-as < %s | llc -march=x86

; ModuleID = 'a.bc'
implementation   ; Functions:

define i32 @foo(i32 %A, i32 %B) {
entry:
	%A_addr = alloca i32		; <i32*> [#uses=2]
	%B_addr = alloca i32		; <i32*> [#uses=1]
	%retval = alloca i32, align 4		; <i32*> [#uses=2]
	%tmp = alloca i32, align 4		; <i32*> [#uses=2]
	%ret = alloca i32, align 4		; <i32*> [#uses=2]
	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
	store i32 %A, i32* %A_addr
	store i32 %B, i32* %B_addr
	%tmp1 = load i32* %A_addr		; <i32> [#uses=1]
	%tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 )		; <i32> [#uses=1]
	store i32 %tmp2, i32* %ret
	%tmp3 = load i32* %ret		; <i32> [#uses=1]
	store i32 %tmp3, i32* %tmp
	%tmp4 = load i32* %tmp		; <i32> [#uses=1]
	store i32 %tmp4, i32* %retval
	br label %return

return:		; preds = %entry
	%retval5 = load i32* %retval		; <i32> [#uses=1]
	ret i32 %retval5
}


Add test for ARM FastISel load/store register classes

; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ALL
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ALL

; FIXME Add tests for thumbv7, they currently fail MI verification because
;       of a mismatch in register classes in uses.

; This test verifies that load/store instructions are properly generated,
; and that they pass MI verification (wasn't the case until 2013-06-08).

@a = global i8 1, align 1
@b = global i16 2, align 2
@c = global i32 4, align 4

; ldr

define i8 @t1() nounwind uwtable ssp {
; ALL: @t1
; ALL: ldrb
; ALL: add
  %1 = load i8* @a, align 1
  %2 = add nsw i8 %1, 1
  ret i8 %2
}

define i16 @t2() nounwind uwtable ssp {
; ALL: @t2
; ALL: ldrh
; ALL: add
  %1 = load i16* @b, align 2
  %2 = add nsw i16 %1, 1
  ret i16 %2
}

define i32 @t3() nounwind uwtable ssp {
; ALL: @t3
; ALL: ldr
; ALL: add
  %1 = load i32* @c, align 4
  %2 = add nsw i32 %1, 1
  ret i32 %2
}

; str

define void @t4(i8 %v) nounwind uwtable ssp {
; ALL: @t4
; ALL: add
; ALL: strb
  %1 = add nsw i8 %v, 1
  store i8 %1, i8* @a, align 1
  ret void
}

define void @t5(i16 %v) nounwind uwtable ssp {
; ALL: @t5
; ALL: add
; ALL: strh
  %1 = add nsw i16 %v, 1
  store i16 %1, i16* @b, align 2
  ret void
}

define void @t6(i32 %v) nounwind uwtable ssp {
; ALL: @t6
; ALL: add
; ALL: str
  %1 = add nsw i32 %v, 1
  store i32 %1, i32* @c, align 4
  ret void
}


Test that converting from double to int64 results in one libcall, not one and a dead one. This is a legalize bug

; This function should have exactly one call to fixdfdi, no more!

; RUN: llvm-as < %s | llc -march=ppc32 | grep 'bl .*fixdfdi' | wc -l | grep 1

double %test2(double %tmp.7705) {
        %mem_tmp.2.0.in = cast double %tmp.7705 to long                ; <long> [#uses=1]
        %mem_tmp.2.0 = cast long %mem_tmp.2.0.in to double
	ret double %mem_tmp.2.0
}


Add some tests for SimplifyCFG's ConstantFoldTerminator(). NFC.

; RUN: opt %s -simplifycfg -S | FileCheck %s

declare i32 @f(i32)

define i32 @basic(i32 %x) {
; CHECK-LABEL: @basic
; CHECK-LABEL: entry:
; CHECK-NEXT:  call i32 @f(i32 0)
; CHECK-NEXT:  ret i32 %0

entry:
  switch i32 %x, label %default [
    i32 5, label %default
    i32 6, label %default
    i32 7, label %default
  ]
default:
  %0 = call i32 @f(i32 0)
  ret i32 %0
}

define i32 @constant() {
; CHECK-LABEL: @constant
; CHECK-LABEL: entry:
; CHECK-NEXT:  call i32 @f(i32 1)
; CHECK-NEXT:  ret i32 %0

entry:
  switch i32 42, label %default [
    i32 41, label %default
    i32 42, label %a
    i32 43, label %b
  ]
default:
  %0 = call i32 @f(i32 0)
  ret i32 %0
a:
  %1 = call i32 @f(i32 1)
  ret i32 %1
b:
  %2 = call i32 @f(i32 2)
  ret i32 %2
}

define i32 @unreachable(i32 %x) {
; CHECK-LABEL: @unreachable
; CHECK-LABEL: entry:
; CHECK-NEXT:  call i32 @f(i32 0)
; CHECK-NEXT:  ret i32 %0

entry:
  switch i32 %x, label %unreachable [
    i32 5, label %a
    i32 6, label %a
    i32 7, label %a
  ]
unreachable:
  unreachable
a:
  %0 = call i32 @f(i32 0)
  ret i32 %0
}


Add Verifier test case for variable argument intrinsics.

; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s

declare void @llvm.experimental.stackmap(i32, i32)
declare void @llvm.donothing(...)

define void @foo1() {
  call void @llvm.experimental.stackmap(i32 0, i32 12)
; CHECK: Callsite was not defined with variable arguments!
  ret void
}

define void @foo2() {
  call void (...)* @llvm.donothing(i32 0, i64 1)
; CHECK: Intrinsic was not defined with variable arguments!
  ret void
}


; RUN: llvm-as %s -o %t.bc
; RUN: lli -enable-eh %t.bc > /dev/null

%struct.__fundamental_type_info_pseudo = type { %struct.__type_info_pseudo }
%struct.__type_info_pseudo = type { i8*, i8* }

@_ZTIi = external constant %struct.__fundamental_type_info_pseudo ; <%struct.__fundamental_type_info_pseudo*> [#uses=1]
@.llvm.eh.catch.all.value = linkonce constant i8* null, section "llvm.metadata" ; <i8**> [#uses=1]

define i32 @main() optsize ssp {
entry:
  %0 = tail call i8* @__cxa_allocate_exception(i64 4) nounwind ; <i8*> [#uses=2]
  %1 = bitcast i8* %0 to i32*                     ; <i32*> [#uses=1]
  store i32 1, i32* %1, align 4
  invoke void @__cxa_throw(i8* %0, i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*), void (i8*)* null) noreturn
          to label %invcont unwind label %lpad

invcont:                                          ; preds = %entry
  unreachable

lpad:                                             ; preds = %entry
  %eh_ptr = tail call i8* @llvm.eh.exception()    ; <i8*> [#uses=2]
  %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8** @.llvm.eh.catch.all.value) ; <i32> [#uses=0]
  %2 = tail call i8* @__cxa_begin_catch(i8* %eh_ptr) nounwind ; <i8*> [#uses=0]
  tail call void @__cxa_end_catch()
  ret i32 0
}

declare i8* @__cxa_allocate_exception(i64) nounwind

declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn

declare i8* @__cxa_begin_catch(i8*) nounwind

declare i8* @llvm.eh.exception() nounwind readonly

declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind

declare void @__cxa_end_catch()

declare i32 @__gxx_personality_v0(...)


Add test case for [Constant Hoisting] Erase dead cast instructions (r204538).

; Test if this compiles without assertions.
; RUN: opt -S -consthoist < %s

target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"

%T = type { i32, i32, i32, i32 }

define i32 @test1() nounwind {
  %base = inttoptr i32 12345678 to %T*
  %addr1 = getelementptr %T* %base, i32 0, i32 1
  %addr2 = getelementptr %T* %base, i32 0, i32 2
  %addr3 = getelementptr %T* %base, i32 0, i32 3
  ret i32 12345678
}


Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions

; RUN: llc < %s -march=x86 -mattr=+avx,+f16c | FileCheck %s

define <4 x float> @test_x86_vcvtph2ps_128(<8 x i16> %a0) {
  ; CHECK: vcvtph2ps
  %res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0) ; <<4 x float>> [#uses=1]
  ret <4 x float> %res
}
declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly

define <8 x float> @test_x86_vcvtph2ps_256(<8 x i16> %a0) {
  ; CHECK: vcvtph2ps
  %res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0) ; <<8 x float>> [#uses=1]
  ret <8 x float> %res
}
declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly

define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) {
  ; CHECK: vcvtps2ph
  %res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
  ret <8 x i16> %res
}
declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly

define <8 x i16> @test_x86_vcvtps2ph_256(<8 x float> %a0) {
  ; CHECK: vcvtps2ph
  %res = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
  ret <8 x i16> %res
}
declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly


Add a test for hoisting instructions with metadata out of then/else blocks

; RUN: opt < %s -simplifycfg -S | FileCheck %s

define void @foo(i1 %c, i8* %p) {
; CHECK: if:
; CHECK-NEXT: load i8* %p, !range !0
; CHECK: !0 = metadata !{i8 0, i8 1, i8 3, i8 5}
if:
  br i1 %c, label %then, label %else
then:
  %t = load i8* %p, !range !0
  br label %out
else:
  %e = load i8* %p, !range !1
  br label %out
out:
  ret void
}

!0 = metadata !{ i8 0, i8 1 }
!1 = metadata !{ i8 3, i8 5 }


Add test case for PR1261, currently XFAILed.

; For PR1261. Before bit accurate type support in InstCombine, this would
; turn the sext into a zext.
; RUN: llvm-as %s -o - | opt -instcombine | llvm-dis &&
; RUN: llvm-as %s -o - | opt -instcombine | llvm-dis | not grep zext
; XFAIL: *

define i16 @test(i31 %zzz) {
entry:
  %A = sext i31 %zzz to i32
  %B = add i32 %A, 16384
  %C = lshr i32 %B, 15
  %D = trunc i32 %C to i16
  ret i16 %D
}